asm/mach-loongson32/irq.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
0004  *
0005  * IRQ mappings for Loongson 1
0006  */
0007
0008 #ifndef __ASM_MACH_LOONGSON32_IRQ_H
0009 #define __ASM_MACH_LOONGSON32_IRQ_H
0010
0011 /*
0012  * CPU core Interrupt Numbers
0013  */
0014 #define MIPS_CPU_IRQ_BASE       0
0015 #define MIPS_CPU_IRQ(x)         (MIPS_CPU_IRQ_BASE + (x))
0016
0017 #define SOFTINT0_IRQ            MIPS_CPU_IRQ(0)
0018 #define SOFTINT1_IRQ            MIPS_CPU_IRQ(1)
0019 #define INT0_IRQ            MIPS_CPU_IRQ(2)
0020 #define INT1_IRQ            MIPS_CPU_IRQ(3)
0021 #define INT2_IRQ            MIPS_CPU_IRQ(4)
0022 #define INT3_IRQ            MIPS_CPU_IRQ(5)
0023 #define INT4_IRQ            MIPS_CPU_IRQ(6)
0024 #define TIMER_IRQ           MIPS_CPU_IRQ(7)     /* cpu timer */
0025
0026 #define MIPS_CPU_IRQS       (MIPS_CPU_IRQ(7) + 1 - MIPS_CPU_IRQ_BASE)
0027
0028 /*
0029  * INT0~3 Interrupt Numbers
0030  */
0031 #define LS1X_IRQ_BASE           MIPS_CPU_IRQS
0032 #define LS1X_IRQ(n, x)          (LS1X_IRQ_BASE + (n << 5) + (x))
0033
0034 #define LS1X_UART0_IRQ          LS1X_IRQ(0, 2)
0035 #if defined(CONFIG_LOONGSON1_LS1B)
0036 #define LS1X_UART1_IRQ          LS1X_IRQ(0, 3)
0037 #define LS1X_UART2_IRQ          LS1X_IRQ(0, 4)
0038 #define LS1X_UART3_IRQ          LS1X_IRQ(0, 5)
0039 #elif defined(CONFIG_LOONGSON1_LS1C)
0040 #define LS1X_UART1_IRQ          LS1X_IRQ(0, 4)
0041 #define LS1X_UART2_IRQ          LS1X_IRQ(0, 5)
0042 #endif
0043 #define LS1X_CAN0_IRQ           LS1X_IRQ(0, 6)
0044 #define LS1X_CAN1_IRQ           LS1X_IRQ(0, 7)
0045 #define LS1X_SPI0_IRQ           LS1X_IRQ(0, 8)
0046 #define LS1X_SPI1_IRQ           LS1X_IRQ(0, 9)
0047 #define LS1X_AC97_IRQ           LS1X_IRQ(0, 10)
0048 #define LS1X_DMA0_IRQ           LS1X_IRQ(0, 13)
0049 #define LS1X_DMA1_IRQ           LS1X_IRQ(0, 14)
0050 #define LS1X_DMA2_IRQ           LS1X_IRQ(0, 15)
0051 #if defined(CONFIG_LOONGSON1_LS1C)
0052 #define LS1X_NAND_IRQ           LS1X_IRQ(0, 16)
0053 #endif
0054 #define LS1X_PWM0_IRQ           LS1X_IRQ(0, 17)
0055 #define LS1X_PWM1_IRQ           LS1X_IRQ(0, 18)
0056 #define LS1X_PWM2_IRQ           LS1X_IRQ(0, 19)
0057 #define LS1X_PWM3_IRQ           LS1X_IRQ(0, 20)
0058 #define LS1X_RTC_INT0_IRQ       LS1X_IRQ(0, 21)
0059 #define LS1X_RTC_INT1_IRQ       LS1X_IRQ(0, 22)
0060 #define LS1X_RTC_INT2_IRQ       LS1X_IRQ(0, 23)
0061 #if defined(CONFIG_LOONGSON1_LS1B)
0062 #define LS1X_TOY_INT0_IRQ       LS1X_IRQ(0, 24)
0063 #define LS1X_TOY_INT1_IRQ       LS1X_IRQ(0, 25)
0064 #define LS1X_TOY_INT2_IRQ       LS1X_IRQ(0, 26)
0065 #define LS1X_RTC_TICK_IRQ       LS1X_IRQ(0, 27)
0066 #define LS1X_TOY_TICK_IRQ       LS1X_IRQ(0, 28)
0067 #define LS1X_UART4_IRQ          LS1X_IRQ(0, 29)
0068 #define LS1X_UART5_IRQ          LS1X_IRQ(0, 30)
0069 #elif defined(CONFIG_LOONGSON1_LS1C)
0070 #define LS1X_UART3_IRQ          LS1X_IRQ(0, 29)
0071 #define LS1X_ADC_IRQ            LS1X_IRQ(0, 30)
0072 #define LS1X_SDIO_IRQ           LS1X_IRQ(0, 31)
0073 #endif
0074
0075 #define LS1X_EHCI_IRQ           LS1X_IRQ(1, 0)
0076 #define LS1X_OHCI_IRQ           LS1X_IRQ(1, 1)
0077 #if defined(CONFIG_LOONGSON1_LS1B)
0078 #define LS1X_GMAC0_IRQ          LS1X_IRQ(1, 2)
0079 #define LS1X_GMAC1_IRQ          LS1X_IRQ(1, 3)
0080 #elif defined(CONFIG_LOONGSON1_LS1C)
0081 #define LS1X_OTG_IRQ            LS1X_IRQ(1, 2)
0082 #define LS1X_GMAC0_IRQ          LS1X_IRQ(1, 3)
0083 #define LS1X_CAM_IRQ            LS1X_IRQ(1, 4)
0084 #define LS1X_UART4_IRQ          LS1X_IRQ(1, 5)
0085 #define LS1X_UART5_IRQ          LS1X_IRQ(1, 6)
0086 #define LS1X_UART6_IRQ          LS1X_IRQ(1, 7)
0087 #define LS1X_UART7_IRQ          LS1X_IRQ(1, 8)
0088 #define LS1X_UART8_IRQ          LS1X_IRQ(1, 9)
0089 #define LS1X_UART9_IRQ          LS1X_IRQ(1, 13)
0090 #define LS1X_UART10_IRQ         LS1X_IRQ(1, 14)
0091 #define LS1X_UART11_IRQ         LS1X_IRQ(1, 15)
0092 #define LS1X_I2C0_IRQ           LS1X_IRQ(1, 17)
0093 #define LS1X_I2C1_IRQ           LS1X_IRQ(1, 18)
0094 #define LS1X_I2C2_IRQ           LS1X_IRQ(1, 19)
0095 #endif
0096
0097 #if defined(CONFIG_LOONGSON1_LS1B)
0098 #define INTN    4
0099 #elif defined(CONFIG_LOONGSON1_LS1C)
0100 #define INTN    5
0101 #endif
0102
0103 #define LS1X_IRQS       (LS1X_IRQ(INTN, 31) + 1 - LS1X_IRQ_BASE)
0104
0105 #define NR_IRQS         (MIPS_CPU_IRQS + LS1X_IRQS)
0106
0107 #endif /* __ASM_MACH_LOONGSON32_IRQ_H */