asm/mach-ip30/cpu-feature-overrides.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * IP30/Octane cpu-features overrides.
0004  *
0005  * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
0006  *       2004-2007 Stanislaw Skowronek <skylark@unaligned.org>
0007  *       2009 Johannes Dickgreber <tanzy@gmx.de>
0008  *       2015 Joshua Kinard <kumba@gentoo.org>
0009  *
0010  */
0011 #ifndef __ASM_MACH_IP30_CPU_FEATURE_OVERRIDES_H
0012 #define __ASM_MACH_IP30_CPU_FEATURE_OVERRIDES_H
0013
0014 #include <asm/cpu.h>
0015
0016 /*
0017  * IP30 only supports R1[024]000 processors, all using the same config
0018  */
0019 #define cpu_has_tlb         1
0020 #define cpu_has_tlbinv          0
0021 #define cpu_has_segments        0
0022 #define cpu_has_eva         0
0023 #define cpu_has_htw         0
0024 #define cpu_has_rixiex          0
0025 #define cpu_has_maar            0
0026 #define cpu_has_rw_llb          0
0027 #define cpu_has_3kex            0
0028 #define cpu_has_4kex            1
0029 #define cpu_has_3k_cache        0
0030 #define cpu_has_4k_cache        1
0031 #define cpu_has_nofpuex         0
0032 #define cpu_has_32fpr           1
0033 #define cpu_has_counter         1
0034 #define cpu_has_watch           1
0035 #define cpu_has_64bits          1
0036 #define cpu_has_divec           0
0037 #define cpu_has_vce         0
0038 #define cpu_has_cache_cdex_p        0
0039 #define cpu_has_cache_cdex_s        0
0040 #define cpu_has_prefetch        1
0041 #define cpu_has_mcheck          0
0042 #define cpu_has_ejtag           0
0043 #define cpu_has_llsc            1
0044 #define cpu_has_mips16          0
0045 #define cpu_has_mdmx            0
0046 #define cpu_has_mips3d          0
0047 #define cpu_has_smartmips       0
0048 #define cpu_has_rixi            0
0049 #define cpu_has_xpa         0
0050 #define cpu_has_vtag_icache     0
0051 #define cpu_has_dc_aliases      0
0052 #define cpu_has_ic_fills_f_dc       0
0053
0054 #define cpu_icache_snoops_remote_store  1
0055
0056 #define cpu_has_mips32r1        0
0057 #define cpu_has_mips32r2        0
0058 #define cpu_has_mips64r1        0
0059 #define cpu_has_mips64r2        0
0060 #define cpu_has_mips32r6        0
0061 #define cpu_has_mips64r6        0
0062
0063 #define cpu_has_dsp         0
0064 #define cpu_has_dsp2            0
0065 #define cpu_has_mipsmt          0
0066 #define cpu_has_userlocal       0
0067 #define cpu_has_inclusive_pcaches   1
0068 #define cpu_has_perf_cntr_intr_bit  0
0069 #define cpu_has_vz          0
0070 #define cpu_has_fre         0
0071 #define cpu_has_cdmm            0
0072
0073 #define cpu_dcache_line_size()      32
0074 #define cpu_icache_line_size()      64
0075 #define cpu_scache_line_size()      128
0076
0077 #endif /* __ASM_MACH_IP30_CPU_FEATURE_OVERRIDES_H */
0078