asm/mach-bcm63xx/bcm63xx_io.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef BCM63XX_IO_H_
0003 #define BCM63XX_IO_H_
0004
0005 #include <asm/mach-bcm63xx/bcm63xx_cpu.h>
0006
0007 /*
0008  * Physical memory map, RAM is mapped at 0x0.
0009  *
0010  * Note that size MUST be a power of two.
0011  */
0012 #define BCM_PCMCIA_COMMON_BASE_PA   (0x20000000)
0013 #define BCM_PCMCIA_COMMON_SIZE      (16 * 1024 * 1024)
0014 #define BCM_PCMCIA_COMMON_END_PA    (BCM_PCMCIA_COMMON_BASE_PA +    \
0015                      BCM_PCMCIA_COMMON_SIZE - 1)
0016
0017 #define BCM_PCMCIA_ATTR_BASE_PA     (0x21000000)
0018 #define BCM_PCMCIA_ATTR_SIZE        (16 * 1024 * 1024)
0019 #define BCM_PCMCIA_ATTR_END_PA      (BCM_PCMCIA_ATTR_BASE_PA +  \
0020                      BCM_PCMCIA_ATTR_SIZE - 1)
0021
0022 #define BCM_PCMCIA_IO_BASE_PA       (0x22000000)
0023 #define BCM_PCMCIA_IO_SIZE      (64 * 1024)
0024 #define BCM_PCMCIA_IO_END_PA        (BCM_PCMCIA_IO_BASE_PA +    \
0025                     BCM_PCMCIA_IO_SIZE - 1)
0026
0027 #define BCM_PCI_MEM_BASE_PA     (0x30000000)
0028 #define BCM_PCI_MEM_SIZE        (128 * 1024 * 1024)
0029 #define BCM_PCI_MEM_END_PA      (BCM_PCI_MEM_BASE_PA +      \
0030                     BCM_PCI_MEM_SIZE - 1)
0031
0032 #define BCM_PCI_IO_BASE_PA      (0x08000000)
0033 #define BCM_PCI_IO_SIZE         (64 * 1024)
0034 #define BCM_PCI_IO_END_PA       (BCM_PCI_IO_BASE_PA +       \
0035                     BCM_PCI_IO_SIZE - 1)
0036 #define BCM_PCI_IO_HALF_PA      (BCM_PCI_IO_BASE_PA +       \
0037                     (BCM_PCI_IO_SIZE / 2) - 1)
0038
0039 #define BCM_CB_MEM_BASE_PA      (0x38000000)
0040 #define BCM_CB_MEM_SIZE         (128 * 1024 * 1024)
0041 #define BCM_CB_MEM_END_PA       (BCM_CB_MEM_BASE_PA +       \
0042                     BCM_CB_MEM_SIZE - 1)
0043
0044 #define BCM_PCIE_MEM_BASE_PA        0x10f00000
0045 #define BCM_PCIE_MEM_SIZE       (16 * 1024 * 1024)
0046 #define BCM_PCIE_MEM_END_PA     (BCM_PCIE_MEM_BASE_PA +     \
0047                     BCM_PCIE_MEM_SIZE - 1)
0048
0049 /*
0050  * Internal registers are accessed through KSEG3
0051  */
0052 #define BCM_REGS_VA(x)  ((void __iomem *)(x))
0053
0054 #define bcm_readb(a)    (*(volatile unsigned char *)    BCM_REGS_VA(a))
0055 #define bcm_readw(a)    (*(volatile unsigned short *)   BCM_REGS_VA(a))
0056 #define bcm_readl(a)    (*(volatile unsigned int *) BCM_REGS_VA(a))
0057 #define bcm_readq(a)    (*(volatile u64 *)      BCM_REGS_VA(a))
0058 #define bcm_writeb(v, a) (*(volatile unsigned char *) BCM_REGS_VA((a)) = (v))
0059 #define bcm_writew(v, a) (*(volatile unsigned short *) BCM_REGS_VA((a)) = (v))
0060 #define bcm_writel(v, a) (*(volatile unsigned int *) BCM_REGS_VA((a)) = (v))
0061 #define bcm_writeq(v, a) (*(volatile u64 *) BCM_REGS_VA((a)) = (v))
0062
0063 /*
0064  * IO helpers to access register set for current CPU
0065  */
0066 #define bcm_rset_readb(s, o)    bcm_readb(bcm63xx_regset_address(s) + (o))
0067 #define bcm_rset_readw(s, o)    bcm_readw(bcm63xx_regset_address(s) + (o))
0068 #define bcm_rset_readl(s, o)    bcm_readl(bcm63xx_regset_address(s) + (o))
0069 #define bcm_rset_writeb(s, v, o)    bcm_writeb((v), \
0070                     bcm63xx_regset_address(s) + (o))
0071 #define bcm_rset_writew(s, v, o)    bcm_writew((v), \
0072                     bcm63xx_regset_address(s) + (o))
0073 #define bcm_rset_writel(s, v, o)    bcm_writel((v), \
0074                     bcm63xx_regset_address(s) + (o))
0075
0076 /*
0077  * helpers for frequently used register sets
0078  */
0079 #define bcm_perf_readl(o)   bcm_rset_readl(RSET_PERF, (o))
0080 #define bcm_perf_writel(v, o)   bcm_rset_writel(RSET_PERF, (v), (o))
0081 #define bcm_timer_readl(o)  bcm_rset_readl(RSET_TIMER, (o))
0082 #define bcm_timer_writel(v, o)  bcm_rset_writel(RSET_TIMER, (v), (o))
0083 #define bcm_wdt_readl(o)    bcm_rset_readl(RSET_WDT, (o))
0084 #define bcm_wdt_writel(v, o)    bcm_rset_writel(RSET_WDT, (v), (o))
0085 #define bcm_gpio_readl(o)   bcm_rset_readl(RSET_GPIO, (o))
0086 #define bcm_gpio_writel(v, o)   bcm_rset_writel(RSET_GPIO, (v), (o))
0087 #define bcm_uart0_readl(o)  bcm_rset_readl(RSET_UART0, (o))
0088 #define bcm_uart0_writel(v, o)  bcm_rset_writel(RSET_UART0, (v), (o))
0089 #define bcm_mpi_readl(o)    bcm_rset_readl(RSET_MPI, (o))
0090 #define bcm_mpi_writel(v, o)    bcm_rset_writel(RSET_MPI, (v), (o))
0091 #define bcm_pcmcia_readl(o) bcm_rset_readl(RSET_PCMCIA, (o))
0092 #define bcm_pcmcia_writel(v, o) bcm_rset_writel(RSET_PCMCIA, (v), (o))
0093 #define bcm_pcie_readl(o)   bcm_rset_readl(RSET_PCIE, (o))
0094 #define bcm_pcie_writel(v, o)   bcm_rset_writel(RSET_PCIE, (v), (o))
0095 #define bcm_sdram_readl(o)  bcm_rset_readl(RSET_SDRAM, (o))
0096 #define bcm_sdram_writel(v, o)  bcm_rset_writel(RSET_SDRAM, (v), (o))
0097 #define bcm_memc_readl(o)   bcm_rset_readl(RSET_MEMC, (o))
0098 #define bcm_memc_writel(v, o)   bcm_rset_writel(RSET_MEMC, (v), (o))
0099 #define bcm_ddr_readl(o)    bcm_rset_readl(RSET_DDR, (o))
0100 #define bcm_ddr_writel(v, o)    bcm_rset_writel(RSET_DDR, (v), (o))
0101 #define bcm_misc_readl(o)   bcm_rset_readl(RSET_MISC, (o))
0102 #define bcm_misc_writel(v, o)   bcm_rset_writel(RSET_MISC, (v), (o))
0103
0104 #endif /* ! BCM63XX_IO_H_ */