asm/mach-ath79/ar933x_uart.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  Atheros AR933X UART defines
0004  *
0005  *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
0006  */
0007
0008 #ifndef __AR933X_UART_H
0009 #define __AR933X_UART_H
0010
0011 #define AR933X_UART_REGS_SIZE       20
0012 #define AR933X_UART_FIFO_SIZE       16
0013
0014 #define AR933X_UART_DATA_REG        0x00
0015 #define AR933X_UART_CS_REG      0x04
0016 #define AR933X_UART_CLOCK_REG       0x08
0017 #define AR933X_UART_INT_REG     0x0c
0018 #define AR933X_UART_INT_EN_REG      0x10
0019
0020 #define AR933X_UART_DATA_TX_RX_MASK 0xff
0021 #define AR933X_UART_DATA_RX_CSR     BIT(8)
0022 #define AR933X_UART_DATA_TX_CSR     BIT(9)
0023
0024 #define AR933X_UART_CS_PARITY_S     0
0025 #define AR933X_UART_CS_PARITY_M     0x3
0026 #define   AR933X_UART_CS_PARITY_NONE    0
0027 #define   AR933X_UART_CS_PARITY_ODD 2
0028 #define   AR933X_UART_CS_PARITY_EVEN    3
0029 #define AR933X_UART_CS_IF_MODE_S    2
0030 #define AR933X_UART_CS_IF_MODE_M    0x3
0031 #define   AR933X_UART_CS_IF_MODE_NONE   0
0032 #define   AR933X_UART_CS_IF_MODE_DTE    1
0033 #define   AR933X_UART_CS_IF_MODE_DCE    2
0034 #define AR933X_UART_CS_FLOW_CTRL_S  4
0035 #define AR933X_UART_CS_FLOW_CTRL_M  0x3
0036 #define AR933X_UART_CS_DMA_EN       BIT(6)
0037 #define AR933X_UART_CS_TX_READY_ORIDE   BIT(7)
0038 #define AR933X_UART_CS_RX_READY_ORIDE   BIT(8)
0039 #define AR933X_UART_CS_TX_READY     BIT(9)
0040 #define AR933X_UART_CS_RX_BREAK     BIT(10)
0041 #define AR933X_UART_CS_TX_BREAK     BIT(11)
0042 #define AR933X_UART_CS_HOST_INT     BIT(12)
0043 #define AR933X_UART_CS_HOST_INT_EN  BIT(13)
0044 #define AR933X_UART_CS_TX_BUSY      BIT(14)
0045 #define AR933X_UART_CS_RX_BUSY      BIT(15)
0046
0047 #define AR933X_UART_CLOCK_STEP_M    0xffff
0048 #define AR933X_UART_CLOCK_SCALE_M   0xfff
0049 #define AR933X_UART_CLOCK_SCALE_S   16
0050 #define AR933X_UART_CLOCK_STEP_M    0xffff
0051
0052 #define AR933X_UART_INT_RX_VALID    BIT(0)
0053 #define AR933X_UART_INT_TX_READY    BIT(1)
0054 #define AR933X_UART_INT_RX_FRAMING_ERR  BIT(2)
0055 #define AR933X_UART_INT_RX_OFLOW_ERR    BIT(3)
0056 #define AR933X_UART_INT_TX_OFLOW_ERR    BIT(4)
0057 #define AR933X_UART_INT_RX_PARITY_ERR   BIT(5)
0058 #define AR933X_UART_INT_RX_BREAK_ON BIT(6)
0059 #define AR933X_UART_INT_RX_BREAK_OFF    BIT(7)
0060 #define AR933X_UART_INT_RX_FULL     BIT(8)
0061 #define AR933X_UART_INT_TX_EMPTY    BIT(9)
0062 #define AR933X_UART_INT_ALLINTS     0x3ff
0063
0064 #endif /* __AR933X_UART_H */