asm/mach-ath25/ath25_platform.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __ASM_MACH_ATH25_PLATFORM_H
0003 #define __ASM_MACH_ATH25_PLATFORM_H
0004
0005 #include <linux/etherdevice.h>
0006
0007 /*
0008  * This is board-specific data that is stored in a "fixed" location in flash.
0009  * It is shared across operating systems, so it should not be changed lightly.
0010  * The main reason we need it is in order to extract the ethernet MAC
0011  * address(es).
0012  */
0013 struct ath25_boarddata {
0014     u32 magic;                   /* board data is valid */
0015 #define ATH25_BD_MAGIC 0x35333131    /* "5311", for all 531x/231x platforms */
0016     u16 cksum;                   /* checksum (starting with BD_REV 2) */
0017     u16 rev;                     /* revision of this struct */
0018 #define BD_REV 4
0019     char board_name[64];         /* Name of board */
0020     u16 major;                   /* Board major number */
0021     u16 minor;                   /* Board minor number */
0022     u32 flags;                   /* Board configuration */
0023 #define BD_ENET0        0x00000001   /* ENET0 is stuffed */
0024 #define BD_ENET1        0x00000002   /* ENET1 is stuffed */
0025 #define BD_UART1        0x00000004   /* UART1 is stuffed */
0026 #define BD_UART0        0x00000008   /* UART0 is stuffed (dma) */
0027 #define BD_RSTFACTORY   0x00000010   /* Reset factory defaults stuffed */
0028 #define BD_SYSLED       0x00000020   /* System LED stuffed */
0029 #define BD_EXTUARTCLK   0x00000040   /* External UART clock */
0030 #define BD_CPUFREQ      0x00000080   /* cpu freq is valid in nvram */
0031 #define BD_SYSFREQ      0x00000100   /* sys freq is set in nvram */
0032 #define BD_WLAN0        0x00000200   /* Enable WLAN0 */
0033 #define BD_MEMCAP       0x00000400   /* CAP SDRAM @ mem_cap for testing */
0034 #define BD_DISWATCHDOG  0x00000800   /* disable system watchdog */
0035 #define BD_WLAN1        0x00001000   /* Enable WLAN1 (ar5212) */
0036 #define BD_ISCASPER     0x00002000   /* FLAG for AR2312 */
0037 #define BD_WLAN0_2G_EN  0x00004000   /* FLAG for radio0_2G */
0038 #define BD_WLAN0_5G_EN  0x00008000   /* FLAG for radio0_2G */
0039 #define BD_WLAN1_2G_EN  0x00020000   /* FLAG for radio0_2G */
0040 #define BD_WLAN1_5G_EN  0x00040000   /* FLAG for radio0_2G */
0041     u16 reset_config_gpio;       /* Reset factory GPIO pin */
0042     u16 sys_led_gpio;            /* System LED GPIO pin */
0043
0044     u32 cpu_freq;                /* CPU core frequency in Hz */
0045     u32 sys_freq;                /* System frequency in Hz */
0046     u32 cnt_freq;                /* Calculated C0_COUNT frequency */
0047
0048     u8  wlan0_mac[ETH_ALEN];
0049     u8  enet0_mac[ETH_ALEN];
0050     u8  enet1_mac[ETH_ALEN];
0051
0052     u16 pci_id;                  /* Pseudo PCIID for common code */
0053     u16 mem_cap;                 /* cap bank1 in MB */
0054
0055     /* version 3 */
0056     u8  wlan1_mac[ETH_ALEN];     /* (ar5212) */
0057 };
0058
0059 #define BOARD_CONFIG_BUFSZ      0x1000
0060
0061 /*
0062  * Platform device information for the Wireless MAC
0063  */
0064 struct ar231x_board_config {
0065     u16 devid;
0066
0067     /* board config data */
0068     struct ath25_boarddata *config;
0069
0070     /* radio calibration data */
0071     const char *radio;
0072 };
0073
0074 #endif /* __ASM_MACH_ATH25_PLATFORM_H */