include/asm/irq_gt641xx.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  *  Galileo/Marvell GT641xx IRQ definitions.
0004  *
0005  *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
0006  */
0007 #ifndef _ASM_IRQ_GT641XX_H
0008 #define _ASM_IRQ_GT641XX_H
0009
0010 #ifndef GT641XX_IRQ_BASE
0011 #define GT641XX_IRQ_BASE        8
0012 #endif
0013
0014 #define GT641XX_MEMORY_OUT_OF_RANGE_IRQ     (GT641XX_IRQ_BASE + 1)
0015 #define GT641XX_DMA_OUT_OF_RANGE_IRQ        (GT641XX_IRQ_BASE + 2)
0016 #define GT641XX_CPU_ACCESS_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 3)
0017 #define GT641XX_DMA0_IRQ            (GT641XX_IRQ_BASE + 4)
0018 #define GT641XX_DMA1_IRQ            (GT641XX_IRQ_BASE + 5)
0019 #define GT641XX_DMA2_IRQ            (GT641XX_IRQ_BASE + 6)
0020 #define GT641XX_DMA3_IRQ            (GT641XX_IRQ_BASE + 7)
0021 #define GT641XX_TIMER0_IRQ          (GT641XX_IRQ_BASE + 8)
0022 #define GT641XX_TIMER1_IRQ          (GT641XX_IRQ_BASE + 9)
0023 #define GT641XX_TIMER2_IRQ          (GT641XX_IRQ_BASE + 10)
0024 #define GT641XX_TIMER3_IRQ          (GT641XX_IRQ_BASE + 11)
0025 #define GT641XX_PCI_0_MASTER_READ_ERROR_IRQ (GT641XX_IRQ_BASE + 12)
0026 #define GT641XX_PCI_0_SLAVE_WRITE_ERROR_IRQ (GT641XX_IRQ_BASE + 13)
0027 #define GT641XX_PCI_0_MASTER_WRITE_ERROR_IRQ    (GT641XX_IRQ_BASE + 14)
0028 #define GT641XX_PCI_0_SLAVE_READ_ERROR_IRQ  (GT641XX_IRQ_BASE + 15)
0029 #define GT641XX_PCI_0_ADDRESS_ERROR_IRQ     (GT641XX_IRQ_BASE + 16)
0030 #define GT641XX_MEMORY_ERROR_IRQ        (GT641XX_IRQ_BASE + 17)
0031 #define GT641XX_PCI_0_MASTER_ABORT_IRQ      (GT641XX_IRQ_BASE + 18)
0032 #define GT641XX_PCI_0_TARGET_ABORT_IRQ      (GT641XX_IRQ_BASE + 19)
0033 #define GT641XX_PCI_0_RETRY_TIMEOUT_IRQ     (GT641XX_IRQ_BASE + 20)
0034 #define GT641XX_CPU_INT0_IRQ            (GT641XX_IRQ_BASE + 21)
0035 #define GT641XX_CPU_INT1_IRQ            (GT641XX_IRQ_BASE + 22)
0036 #define GT641XX_CPU_INT2_IRQ            (GT641XX_IRQ_BASE + 23)
0037 #define GT641XX_CPU_INT3_IRQ            (GT641XX_IRQ_BASE + 24)
0038 #define GT641XX_CPU_INT4_IRQ            (GT641XX_IRQ_BASE + 25)
0039 #define GT641XX_PCI_INT0_IRQ            (GT641XX_IRQ_BASE + 26)
0040 #define GT641XX_PCI_INT1_IRQ            (GT641XX_IRQ_BASE + 27)
0041 #define GT641XX_PCI_INT2_IRQ            (GT641XX_IRQ_BASE + 28)
0042 #define GT641XX_PCI_INT3_IRQ            (GT641XX_IRQ_BASE + 29)
0043
0044 extern void gt641xx_irq_dispatch(void);
0045 extern void gt641xx_irq_init(void);
0046
0047 #endif /* _ASM_IRQ_GT641XX_H */