asm/ip32/ip32_ints.h

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 2000 Harald Koerfgen
0007  */
0008
0009 #ifndef __ASM_IP32_INTS_H
0010 #define __ASM_IP32_INTS_H
0011
0012 #include <asm/irq.h>
0013
0014 /*
0015  * This list reflects the assignment of interrupt numbers to
0016  * interrupting events.  Order is fairly irrelevant to handling
0017  * priority.  This differs from irix.
0018  */
0019
0020 enum ip32_irq_no {
0021     /*
0022      * CPU interrupts are 0 ... 7
0023      */
0024
0025     CRIME_IRQ_BASE          = MIPS_CPU_IRQ_BASE + 8,
0026
0027     /*
0028      * MACE
0029      */
0030     MACE_VID_IN1_IRQ        = CRIME_IRQ_BASE,
0031     MACE_VID_IN2_IRQ,
0032     MACE_VID_OUT_IRQ,
0033     MACE_ETHERNET_IRQ,
0034     /* SUPERIO, MISC, and AUDIO are MACEISA */
0035     __MACE_SUPERIO,
0036     __MACE_MISC,
0037     __MACE_AUDIO,
0038     MACE_PCI_BRIDGE_IRQ,
0039
0040     /*
0041      * MACEPCI
0042      */
0043     MACEPCI_SCSI0_IRQ,
0044     MACEPCI_SCSI1_IRQ,
0045     MACEPCI_SLOT0_IRQ,
0046     MACEPCI_SLOT1_IRQ,
0047     MACEPCI_SLOT2_IRQ,
0048     MACEPCI_SHARED0_IRQ,
0049     MACEPCI_SHARED1_IRQ,
0050     MACEPCI_SHARED2_IRQ,
0051
0052     /*
0053      * CRIME
0054      */
0055     CRIME_GBE0_IRQ,
0056     CRIME_GBE1_IRQ,
0057     CRIME_GBE2_IRQ,
0058     CRIME_GBE3_IRQ,
0059     CRIME_CPUERR_IRQ,
0060     CRIME_MEMERR_IRQ,
0061     CRIME_RE_EMPTY_E_IRQ,
0062     CRIME_RE_FULL_E_IRQ,
0063     CRIME_RE_IDLE_E_IRQ,
0064     CRIME_RE_EMPTY_L_IRQ,
0065     CRIME_RE_FULL_L_IRQ,
0066     CRIME_RE_IDLE_L_IRQ,
0067     CRIME_SOFT0_IRQ,
0068     CRIME_SOFT1_IRQ,
0069     CRIME_SOFT2_IRQ,
0070     CRIME_SYSCORERR_IRQ     = CRIME_SOFT2_IRQ,
0071     CRIME_VICE_IRQ,
0072
0073     /*
0074      * MACEISA
0075      */
0076     MACEISA_AUDIO_SW_IRQ,
0077     MACEISA_AUDIO_SC_IRQ,
0078     MACEISA_AUDIO1_DMAT_IRQ,
0079     MACEISA_AUDIO1_OF_IRQ,
0080     MACEISA_AUDIO2_DMAT_IRQ,
0081     MACEISA_AUDIO2_MERR_IRQ,
0082     MACEISA_AUDIO3_DMAT_IRQ,
0083     MACEISA_AUDIO3_MERR_IRQ,
0084     MACEISA_RTC_IRQ,
0085     MACEISA_KEYB_IRQ,
0086     /* MACEISA_KEYB_POLL is not an IRQ */
0087     __MACEISA_KEYB_POLL,
0088     MACEISA_MOUSE_IRQ,
0089     /* MACEISA_MOUSE_POLL is not an IRQ */
0090     __MACEISA_MOUSE_POLL,
0091     MACEISA_TIMER0_IRQ,
0092     MACEISA_TIMER1_IRQ,
0093     MACEISA_TIMER2_IRQ,
0094     MACEISA_PARALLEL_IRQ,
0095     MACEISA_PAR_CTXA_IRQ,
0096     MACEISA_PAR_CTXB_IRQ,
0097     MACEISA_PAR_MERR_IRQ,
0098     MACEISA_SERIAL1_IRQ,
0099     MACEISA_SERIAL1_TDMAT_IRQ,
0100     MACEISA_SERIAL1_TDMAPR_IRQ,
0101     MACEISA_SERIAL1_TDMAME_IRQ,
0102     MACEISA_SERIAL1_RDMAT_IRQ,
0103     MACEISA_SERIAL1_RDMAOR_IRQ,
0104     MACEISA_SERIAL2_IRQ,
0105     MACEISA_SERIAL2_TDMAT_IRQ,
0106     MACEISA_SERIAL2_TDMAPR_IRQ,
0107     MACEISA_SERIAL2_TDMAME_IRQ,
0108     MACEISA_SERIAL2_RDMAT_IRQ,
0109     MACEISA_SERIAL2_RDMAOR_IRQ,
0110
0111     IP32_IRQ_MAX            = MACEISA_SERIAL2_RDMAOR_IRQ
0112 };
0113
0114 #endif /* __ASM_IP32_INTS_H */