include/asm/inst.h

0001 /*
0002  * Format of an instruction in memory.
0003  *
0004  * This file is subject to the terms and conditions of the GNU General Public
0005  * License.  See the file "COPYING" in the main directory of this archive
0006  * for more details.
0007  *
0008  * Copyright (C) 1996, 2000 by Ralf Baechle
0009  * Copyright (C) 2006 by Thiemo Seufer
0010  */
0011 #ifndef _ASM_INST_H
0012 #define _ASM_INST_H
0013
0014 #include <uapi/asm/inst.h>
0015
0016 /* HACHACHAHCAHC ...  */
0017
0018 /* In case some other massaging is needed, keep MIPSInst as wrapper */
0019
0020 #define MIPSInst(x) x
0021
0022 #define I_OPCODE_SFT    26
0023 #define MIPSInst_OPCODE(x) (MIPSInst(x) >> I_OPCODE_SFT)
0024
0025 #define I_JTARGET_SFT   0
0026 #define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff)
0027
0028 #define I_RS_SFT    21
0029 #define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT)
0030
0031 #define I_RT_SFT    16
0032 #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT)
0033
0034 #define I_IMM_SFT   0
0035 #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff)))
0036 #define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff)
0037
0038 #define I_CACHEOP_SFT   18
0039 #define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT)
0040
0041 #define I_CACHESEL_SFT  16
0042 #define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT)
0043
0044 #define I_RD_SFT    11
0045 #define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT)
0046
0047 #define I_RE_SFT    6
0048 #define MIPSInst_RE(x) ((MIPSInst(x) & 0x000007c0) >> I_RE_SFT)
0049
0050 #define I_FUNC_SFT  0
0051 #define MIPSInst_FUNC(x) (MIPSInst(x) & 0x0000003f)
0052
0053 #define I_FFMT_SFT  21
0054 #define MIPSInst_FFMT(x) ((MIPSInst(x) & 0x01e00000) >> I_FFMT_SFT)
0055
0056 #define I_FT_SFT    16
0057 #define MIPSInst_FT(x) ((MIPSInst(x) & 0x001f0000) >> I_FT_SFT)
0058
0059 #define I_FS_SFT    11
0060 #define MIPSInst_FS(x) ((MIPSInst(x) & 0x0000f800) >> I_FS_SFT)
0061
0062 #define I_FD_SFT    6
0063 #define MIPSInst_FD(x) ((MIPSInst(x) & 0x000007c0) >> I_FD_SFT)
0064
0065 #define I_FR_SFT    21
0066 #define MIPSInst_FR(x) ((MIPSInst(x) & 0x03e00000) >> I_FR_SFT)
0067
0068 #define I_FMA_FUNC_SFT  3
0069 #define MIPSInst_FMA_FUNC(x) ((MIPSInst(x) & 0x00000038) >> I_FMA_FUNC_SFT)
0070
0071 #define I_FMA_FFMT_SFT  0
0072 #define MIPSInst_FMA_FFMT(x) (MIPSInst(x) & 0x00000007)
0073
0074 typedef unsigned int mips_instruction;
0075
0076 /* microMIPS instruction decode structure. Do NOT export!!! */
0077 struct mm_decoded_insn {
0078     mips_instruction insn;
0079     mips_instruction next_insn;
0080     int pc_inc;
0081     int next_pc_inc;
0082     int micro_mips_mode;
0083 };
0084
0085 /* Recode table from 16-bit register notation to 32-bit GPR. Do NOT export!!! */
0086 extern const int reg16to32[];
0087
0088 #endif /* _ASM_INST_H */