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0001 /*
0002  * Definitions for the FPU register names
0003  *
0004  * This file is subject to the terms and conditions of the GNU General Public
0005  * License.  See the file "COPYING" in the main directory of this archive
0006  * for more details.
0007  *
0008  * Copyright (C) 1995, 1999 Ralf Baechle
0009  * Copyright (C) 1985 MIPS Computer Systems, Inc.
0010  * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
0011  */
0012 #ifndef _ASM_FPREGDEF_H
0013 #define _ASM_FPREGDEF_H
0014 
0015 #include <asm/sgidefs.h>
0016 
0017 /*
0018  * starting with binutils 2.24.51.20140729, MIPS binutils warn about mixing
0019  * hardfloat and softfloat object files.  The kernel build uses soft-float by
0020  * default, so we also need to pass -msoft-float along to GAS if it supports it.
0021  * But this in turn causes assembler errors in files which access hardfloat
0022  * registers.  We detect if GAS supports "-msoft-float" in the Makefile and
0023  * explicitly put ".set hardfloat" where floating point registers are touched.
0024  */
0025 #ifdef GAS_HAS_SET_HARDFLOAT
0026 #define SET_HARDFLOAT .set hardfloat
0027 #else
0028 #define SET_HARDFLOAT
0029 #endif
0030 
0031 #if _MIPS_SIM == _MIPS_SIM_ABI32
0032 
0033 /*
0034  * These definitions only cover the R3000-ish 16/32 register model.
0035  * But we're trying to be R3000 friendly anyway ...
0036  */
0037 #define fv0 $f0  /* return value */
0038 #define fv0f    $f1
0039 #define fv1 $f2
0040 #define fv1f    $f3
0041 #define fa0 $f12     /* argument registers */
0042 #define fa0f    $f13
0043 #define fa1 $f14
0044 #define fa1f    $f15
0045 #define ft0 $f4  /* caller saved */
0046 #define ft0f    $f5
0047 #define ft1 $f6
0048 #define ft1f    $f7
0049 #define ft2 $f8
0050 #define ft2f    $f9
0051 #define ft3 $f10
0052 #define ft3f    $f11
0053 #define ft4 $f16
0054 #define ft4f    $f17
0055 #define ft5 $f18
0056 #define ft5f    $f19
0057 #define fs0 $f20     /* callee saved */
0058 #define fs0f    $f21
0059 #define fs1 $f22
0060 #define fs1f    $f23
0061 #define fs2 $f24
0062 #define fs2f    $f25
0063 #define fs3 $f26
0064 #define fs3f    $f27
0065 #define fs4 $f28
0066 #define fs4f    $f29
0067 #define fs5 $f30
0068 #define fs5f    $f31
0069 
0070 #define fcr31   $31  /* FPU status register */
0071 
0072 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
0073 
0074 #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
0075 
0076 #define fv0 $f0 /* return value */
0077 #define fv1 $f2
0078 #define fa0 $f12    /* argument registers */
0079 #define fa1 $f13
0080 #define fa2 $f14
0081 #define fa3 $f15
0082 #define fa4 $f16
0083 #define fa5 $f17
0084 #define fa6 $f18
0085 #define fa7 $f19
0086 #define ft0 $f4 /* caller saved */
0087 #define ft1 $f5
0088 #define ft2 $f6
0089 #define ft3 $f7
0090 #define ft4 $f8
0091 #define ft5 $f9
0092 #define ft6 $f10
0093 #define ft7 $f11
0094 #define ft8 $f20
0095 #define ft9 $f21
0096 #define ft10    $f22
0097 #define ft11    $f23
0098 #define ft12    $f1
0099 #define ft13    $f3
0100 #define fs0 $f24    /* callee saved */
0101 #define fs1 $f25
0102 #define fs2 $f26
0103 #define fs3 $f27
0104 #define fs4 $f28
0105 #define fs5 $f29
0106 #define fs6 $f30
0107 #define fs7 $f31
0108 
0109 #define fcr31   $31
0110 
0111 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
0112 
0113 #endif /* _ASM_FPREGDEF_H */