asm/dec/kn03.h

0001 /*
0002  * Hardware info about DECstation 5000/2x0 systems (otherwise known as
0003  * 3max+) and DECsystem 5900 systems (otherwise known as bigmax) which
0004  * differ mechanically but are otherwise identical (both are known as
0005  * KN03).
0006  *
0007  * This file is subject to the terms and conditions of the GNU General Public
0008  * License.  See the file "COPYING" in the main directory of this archive
0009  * for more details.
0010  *
0011  * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
0012  * are by courtesy of Chris Fraser.
0013  * Copyright (C) 2000, 2002, 2003, 2005  Maciej W. Rozycki
0014  */
0015 #ifndef __ASM_MIPS_DEC_KN03_H
0016 #define __ASM_MIPS_DEC_KN03_H
0017
0018 #include <asm/dec/ecc.h>
0019 #include <asm/dec/ioasic_addrs.h>
0020
0021 #define KN03_SLOT_BASE      0x1f800000
0022
0023 /*
0024  * CPU interrupt bits.
0025  */
0026 #define KN03_CPU_INR_HALT   6   /* HALT button */
0027 #define KN03_CPU_INR_BUS    5   /* memory, I/O bus read/write errors */
0028 #define KN03_CPU_INR_RES_4  4   /* unused */
0029 #define KN03_CPU_INR_RTC    3   /* DS1287 RTC */
0030 #define KN03_CPU_INR_CASCADE    2   /* I/O ASIC cascade */
0031
0032 /*
0033  * I/O ASIC interrupt bits.  Star marks denote non-IRQ status bits.
0034  */
0035 #define KN03_IO_INR_3MAXP   15  /* (*) 3max+/bigmax ID */
0036 #define KN03_IO_INR_NVRAM   14  /* (*) NVRAM clear jumper */
0037 #define KN03_IO_INR_TC2     13  /* TURBOchannel slot #2 */
0038 #define KN03_IO_INR_TC1     12  /* TURBOchannel slot #1 */
0039 #define KN03_IO_INR_TC0     11  /* TURBOchannel slot #0 */
0040 #define KN03_IO_INR_NRMOD   10  /* (*) NRMOD manufacturing jumper */
0041 #define KN03_IO_INR_ASC     9   /* ASC (NCR53C94) SCSI */
0042 #define KN03_IO_INR_LANCE   8   /* LANCE (Am7990) Ethernet */
0043 #define KN03_IO_INR_SCC1    7   /* SCC (Z85C30) serial #1 */
0044 #define KN03_IO_INR_SCC0    6   /* SCC (Z85C30) serial #0 */
0045 #define KN03_IO_INR_RTC     5   /* DS1287 RTC */
0046 #define KN03_IO_INR_PSU     4   /* power supply unit warning */
0047 #define KN03_IO_INR_RES_3   3   /* unused */
0048 #define KN03_IO_INR_ASC_DATA    2   /* SCSI data ready (for PIO) */
0049 #define KN03_IO_INR_PBNC    1   /* ~HALT button debouncer */
0050 #define KN03_IO_INR_PBNO    0   /* HALT button debouncer */
0051
0052
0053 /*
0054  * Memory Control Register bits.
0055  */
0056 #define KN03_MCR_RES_16     (0xffff<<16)    /* unused */
0057 #define KN03_MCR_DIAGCHK    (1<<15)     /* diagn/norml ECC reads */
0058 #define KN03_MCR_DIAGGEN    (1<<14)     /* diagn/norml ECC writes */
0059 #define KN03_MCR_CORRECT    (1<<13)     /* ECC correct/check */
0060 #define KN03_MCR_RES_11     (0x3<<12)   /* unused */
0061 #define KN03_MCR_BNK32M     (1<<10)     /* 32M/8M stride */
0062 #define KN03_MCR_RES_7      (0x7<<7)    /* unused */
0063 #define KN03_MCR_CHECK      (0x7f<<0)   /* diagnostic check bits */
0064
0065 /*
0066  * I/O ASIC System Support Register bits.
0067  */
0068 #define KN03_IO_SSR_TXDIS1  (1<<14)     /* SCC1 transmit disable */
0069 #define KN03_IO_SSR_TXDIS0  (1<<13)     /* SCC0 transmit disable */
0070 #define KN03_IO_SSR_RES_12  (1<<12)     /* unused */
0071
0072 #define KN03_IO_SSR_LEDS    (0xff<<0)   /* ~diagnostic LEDs */
0073
0074 #endif /* __ASM_MIPS_DEC_KN03_H */