asm/dec/kn02.h

0001 /*
0002  * Hardware info about DECstation 5000/200 systems (otherwise known as
0003  * 3max or KN02).
0004  *
0005  * This file is subject to the terms and conditions of the GNU General Public
0006  * License.  See the file "COPYING" in the main directory of this archive
0007  * for more details.
0008  *
0009  * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
0010  * are by courtesy of Chris Fraser.
0011  * Copyright (C) 2002, 2003, 2005  Maciej W. Rozycki
0012  */
0013 #ifndef __ASM_MIPS_DEC_KN02_H
0014 #define __ASM_MIPS_DEC_KN02_H
0015
0016 #define KN02_SLOT_BASE  0x1fc00000
0017 #define KN02_SLOT_SIZE  0x00080000
0018
0019 /*
0020  * Address ranges decoded by the "system slot" logic for onboard devices.
0021  */
0022 #define KN02_SYS_ROM    (0*KN02_SLOT_SIZE)  /* system board ROM */
0023 #define KN02_RES_1  (1*KN02_SLOT_SIZE)  /* unused */
0024 #define KN02_CHKSYN (2*KN02_SLOT_SIZE)  /* ECC syndrome */
0025 #define KN02_ERRADDR    (3*KN02_SLOT_SIZE)  /* bus error address */
0026 #define KN02_DZ11   (4*KN02_SLOT_SIZE)  /* DZ11 (DC7085) serial */
0027 #define KN02_RTC    (5*KN02_SLOT_SIZE)  /* DS1287 RTC */
0028 #define KN02_CSR    (6*KN02_SLOT_SIZE)  /* system ctrl & status reg */
0029 #define KN02_SYS_ROM_7  (7*KN02_SLOT_SIZE)  /* system board ROM (alias) */
0030
0031
0032 /*
0033  * System Control & Status Register bits.
0034  */
0035 #define KN02_CSR_RES_28     (0xf<<28)   /* unused */
0036 #define KN02_CSR_PSU        (1<<27)     /* power supply unit warning */
0037 #define KN02_CSR_NVRAM      (1<<26)     /* ~NVRAM clear jumper */
0038 #define KN02_CSR_REFEVEN    (1<<25)     /* mem refresh bank toggle */
0039 #define KN02_CSR_NRMOD      (1<<24)     /* ~NRMOD manufact. jumper */
0040 #define KN02_CSR_IOINTEN    (0xff<<16)  /* IRQ mask bits */
0041 #define KN02_CSR_DIAGCHK    (1<<15)     /* diagn/norml ECC reads */
0042 #define KN02_CSR_DIAGGEN    (1<<14)     /* diagn/norml ECC writes */
0043 #define KN02_CSR_CORRECT    (1<<13)     /* ECC correct/check */
0044 #define KN02_CSR_LEDIAG     (1<<12)     /* ECC diagn. latch strobe */
0045 #define KN02_CSR_TXDIS      (1<<11)     /* DZ11 transmit disable */
0046 #define KN02_CSR_BNK32M     (1<<10)     /* 32M/8M stride */
0047 #define KN02_CSR_DIAGDN     (1<<9)      /* DIAGDN manufact. jumper */
0048 #define KN02_CSR_BAUD38     (1<<8)      /* DZ11 38/19kbps ext. rate */
0049 #define KN02_CSR_IOINT      (0xff<<0)   /* IRQ status bits (r/o) */
0050 #define KN02_CSR_LEDS       (0xff<<0)   /* ~diagnostic LEDs (w/o) */
0051
0052
0053 /*
0054  * CPU interrupt bits.
0055  */
0056 #define KN02_CPU_INR_RES_6  6   /* unused */
0057 #define KN02_CPU_INR_BUS    5   /* memory, I/O bus read/write errors */
0058 #define KN02_CPU_INR_RES_4  4   /* unused */
0059 #define KN02_CPU_INR_RTC    3   /* DS1287 RTC */
0060 #define KN02_CPU_INR_CASCADE    2   /* CSR cascade */
0061
0062 /*
0063  * CSR interrupt bits.
0064  */
0065 #define KN02_CSR_INR_DZ11   7   /* DZ11 (DC7085) serial */
0066 #define KN02_CSR_INR_LANCE  6   /* LANCE (Am7990) Ethernet */
0067 #define KN02_CSR_INR_ASC    5   /* ASC (NCR53C94) SCSI */
0068 #define KN02_CSR_INR_RES_4  4   /* unused */
0069 #define KN02_CSR_INR_RES_3  3   /* unused */
0070 #define KN02_CSR_INR_TC2    2   /* TURBOchannel slot #2 */
0071 #define KN02_CSR_INR_TC1    1   /* TURBOchannel slot #1 */
0072 #define KN02_CSR_INR_TC0    0   /* TURBOchannel slot #0 */
0073
0074
0075 #define KN02_IRQ_BASE       8   /* first IRQ assigned to CSR */
0076 #define KN02_IRQ_LINES      8   /* number of CSR interrupts */
0077
0078 #define KN02_IRQ_NR(n)      ((n) + KN02_IRQ_BASE)
0079 #define KN02_IRQ_MASK(n)    (1 << (n))
0080 #define KN02_IRQ_ALL        0xff
0081
0082
0083 #ifndef __ASSEMBLY__
0084
0085 #include <linux/types.h>
0086
0087 extern u32 cached_kn02_csr;
0088 extern void init_kn02_irqs(int base);
0089 #endif
0090
0091 #endif /* __ASM_MIPS_DEC_KN02_H */