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0001 /*
0002  * Hardware info about DECstation DS2100/3100 systems (otherwise known as
0003  * pmin/pmax or KN01).
0004  *
0005  * This file is subject to the terms and conditions of the GNU General Public
0006  * License.  See the file "COPYING" in the main directory of this archive
0007  * for more details.
0008  *
0009  * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
0010  * are by courtesy of Chris Fraser.
0011  * Copyright (C) 2002, 2003, 2005  Maciej W. Rozycki
0012  */
0013 #ifndef __ASM_MIPS_DEC_KN01_H
0014 #define __ASM_MIPS_DEC_KN01_H
0015 
0016 #define KN01_SLOT_BASE  0x10000000
0017 #define KN01_SLOT_SIZE  0x01000000
0018 
0019 /*
0020  * Address ranges for devices.
0021  */
0022 #define KN01_PMASK  (0*KN01_SLOT_SIZE)  /* color plane mask */
0023 #define KN01_PCC    (1*KN01_SLOT_SIZE)  /* PCC (DC503) cursor */
0024 #define KN01_VDAC   (2*KN01_SLOT_SIZE)  /* color map */
0025 #define KN01_RES_3  (3*KN01_SLOT_SIZE)  /* unused */
0026 #define KN01_RES_4  (4*KN01_SLOT_SIZE)  /* unused */
0027 #define KN01_RES_5  (5*KN01_SLOT_SIZE)  /* unused */
0028 #define KN01_RES_6  (6*KN01_SLOT_SIZE)  /* unused */
0029 #define KN01_ERRADDR    (7*KN01_SLOT_SIZE)  /* write error address */
0030 #define KN01_LANCE  (8*KN01_SLOT_SIZE)  /* LANCE (Am7990) Ethernet */
0031 #define KN01_LANCE_MEM  (9*KN01_SLOT_SIZE)  /* LANCE buffer memory */
0032 #define KN01_SII    (10*KN01_SLOT_SIZE) /* SII (DC7061) SCSI */
0033 #define KN01_SII_MEM    (11*KN01_SLOT_SIZE) /* SII buffer memory */
0034 #define KN01_DZ11   (12*KN01_SLOT_SIZE) /* DZ11 (DC7085) serial */
0035 #define KN01_RTC    (13*KN01_SLOT_SIZE) /* DS1287 RTC (bytes #0) */
0036 #define KN01_ESAR   (13*KN01_SLOT_SIZE) /* MAC address (bytes #1) */
0037 #define KN01_CSR    (14*KN01_SLOT_SIZE) /* system ctrl & status reg */
0038 #define KN01_SYS_ROM    (15*KN01_SLOT_SIZE) /* system board ROM */
0039 
0040 
0041 /*
0042  * Frame buffer memory address.
0043  */
0044 #define KN01_VFB_MEM    0x0fc00000
0045 
0046 /*
0047  * CPU interrupt bits.
0048  */
0049 #define KN01_CPU_INR_BUS    6   /* memory, I/O bus read/write errors */
0050 #define KN01_CPU_INR_VIDEO  6   /* PCC area detect #2 */
0051 #define KN01_CPU_INR_RTC    5   /* DS1287 RTC */
0052 #define KN01_CPU_INR_DZ11   4   /* DZ11 (DC7085) serial */
0053 #define KN01_CPU_INR_LANCE  3   /* LANCE (Am7990) Ethernet */
0054 #define KN01_CPU_INR_SII    2   /* SII (DC7061) SCSI */
0055 
0056 
0057 /*
0058  * System Control & Status Register bits.
0059  */
0060 #define KN01_CSR_MNFMOD     (1<<15) /* MNFMOD manufacturing jumper */
0061 #define KN01_CSR_STATUS     (1<<14) /* self-test result status output */
0062 #define KN01_CSR_PARDIS     (1<<13) /* parity error disable */
0063 #define KN01_CSR_CRSRTST    (1<<12) /* PCC test output */
0064 #define KN01_CSR_MONO       (1<<11) /* mono/color fb SIMM installed */
0065 #define KN01_CSR_MEMERR     (1<<10) /* write timeout error status & ack*/
0066 #define KN01_CSR_VINT       (1<<9)  /* PCC area detect #2 status & ack */
0067 #define KN01_CSR_TXDIS      (1<<8)  /* DZ11 transmit disable */
0068 #define KN01_CSR_VBGTRG     (1<<2)  /* blue DAC voltage over green (r/o) */
0069 #define KN01_CSR_VRGTRG     (1<<1)  /* red DAC voltage over green (r/o) */
0070 #define KN01_CSR_VRGTRB     (1<<0)  /* red DAC voltage over blue (r/o) */
0071 #define KN01_CSR_LEDS       (0xff<<0) /* ~diagnostic LEDs (w/o) */
0072 
0073 
0074 #ifndef __ASSEMBLY__
0075 
0076 #include <linux/interrupt.h>
0077 #include <linux/spinlock.h>
0078 #include <linux/types.h>
0079 
0080 struct pt_regs;
0081 
0082 extern u16 cached_kn01_csr;
0083 
0084 extern void dec_kn01_be_init(void);
0085 extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup);
0086 extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id);
0087 #endif
0088 
0089 #endif /* __ASM_MIPS_DEC_KN01_H */