asm/dec/ecc.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  *  include/asm-mips/dec/ecc.h
0004  *
0005  *  ECC handling logic definitions common to DECstation/DECsystem
0006  *  5000/200 (KN02), 5000/240 (KN03), 5000/260 (KN05) and
0007  *  DECsystem 5900 (KN03), 5900/260 (KN05) systems.
0008  *
0009  *  Copyright (C) 2003  Maciej W. Rozycki
0010  */
0011 #ifndef __ASM_MIPS_DEC_ECC_H
0012 #define __ASM_MIPS_DEC_ECC_H
0013
0014 /*
0015  * Error Address Register bits.
0016  * The register is r/wc -- any write clears it.
0017  */
0018 #define KN0X_EAR_VALID      (1<<31)     /* error data valid, bus IRQ */
0019 #define KN0X_EAR_CPU        (1<<30)     /* CPU/DMA transaction */
0020 #define KN0X_EAR_WRITE      (1<<29)     /* write/read transaction */
0021 #define KN0X_EAR_ECCERR     (1<<28)     /* ECC/timeout or overrun */
0022 #define KN0X_EAR_RES_27     (1<<27)     /* unused */
0023 #define KN0X_EAR_ADDRESS    (0x7ffffff<<0)  /* address involved */
0024
0025 /*
0026  * Error Syndrome Register bits.
0027  * The register is frozen when EAR.VALID is set, otherwise it records bits
0028  * from the last memory read.  The register is r/wc -- any write clears it.
0029  */
0030 #define KN0X_ESR_VLDHI      (1<<31)     /* error data valid hi word */
0031 #define KN0X_ESR_CHKHI      (0x7f<<24)  /* check bits read from mem */
0032 #define KN0X_ESR_SNGHI      (1<<23)     /* single/double bit error */
0033 #define KN0X_ESR_SYNHI      (0x7f<<16)  /* syndrome from ECC logic */
0034 #define KN0X_ESR_VLDLO      (1<<15)     /* error data valid lo word */
0035 #define KN0X_ESR_CHKLO      (0x7f<<8)   /* check bits read from mem */
0036 #define KN0X_ESR_SNGLO      (1<<7)      /* single/double bit error */
0037 #define KN0X_ESR_SYNLO      (0x7f<<0)   /* syndrome from ECC logic */
0038
0039
0040 #ifndef __ASSEMBLY__
0041
0042 #include <linux/interrupt.h>
0043
0044 struct pt_regs;
0045
0046 extern void dec_ecc_be_init(void);
0047 extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup);
0048 extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id);
0049 #endif
0050
0051 #endif /* __ASM_MIPS_DEC_ECC_H */