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0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 2014 Imagination Technologies Ltd.
0007  *
0008  */
0009 
0010 #ifndef __ASM_ASM_EVA_H
0011 #define __ASM_ASM_EVA_H
0012 
0013 #ifndef __ASSEMBLY__
0014 
0015 /* Kernel variants */
0016 
0017 #define kernel_cache(op, base)      "cache " op ", " base "\n"
0018 #define kernel_pref(hint, base)     "pref " hint ", " base "\n"
0019 #define kernel_ll(reg, addr)        "ll " reg ", " addr "\n"
0020 #define kernel_sc(reg, addr)        "sc " reg ", " addr "\n"
0021 #define kernel_lw(reg, addr)        "lw " reg ", " addr "\n"
0022 #define kernel_lwl(reg, addr)       "lwl " reg ", " addr "\n"
0023 #define kernel_lwr(reg, addr)       "lwr " reg ", " addr "\n"
0024 #define kernel_lh(reg, addr)        "lh " reg ", " addr "\n"
0025 #define kernel_lb(reg, addr)        "lb " reg ", " addr "\n"
0026 #define kernel_lbu(reg, addr)       "lbu " reg ", " addr "\n"
0027 #define kernel_sw(reg, addr)        "sw " reg ", " addr "\n"
0028 #define kernel_swl(reg, addr)       "swl " reg ", " addr "\n"
0029 #define kernel_swr(reg, addr)       "swr " reg ", " addr "\n"
0030 #define kernel_sh(reg, addr)        "sh " reg ", " addr "\n"
0031 #define kernel_sb(reg, addr)        "sb " reg ", " addr "\n"
0032 
0033 #ifdef CONFIG_32BIT
0034 /*
0035  * No 'sd' or 'ld' instructions in 32-bit but the code will
0036  * do the correct thing
0037  */
0038 #define kernel_sd(reg, addr)        user_sw(reg, addr)
0039 #define kernel_ld(reg, addr)        user_lw(reg, addr)
0040 #else
0041 #define kernel_sd(reg, addr)        "sd " reg", " addr "\n"
0042 #define kernel_ld(reg, addr)        "ld " reg", " addr "\n"
0043 #endif /* CONFIG_32BIT */
0044 
0045 #ifdef CONFIG_EVA
0046 
0047 #define __BUILD_EVA_INSN(insn, reg, addr)               \
0048                 "   .set    push\n"         \
0049                 "   .set    mips0\n"        \
0050                 "   .set    eva\n"          \
0051                 "   "insn" "reg", "addr "\n"    \
0052                 "   .set    pop\n"
0053 
0054 #define user_cache(op, base)        __BUILD_EVA_INSN("cachee", op, base)
0055 #define user_pref(hint, base)       __BUILD_EVA_INSN("prefe", hint, base)
0056 #define user_ll(reg, addr)      __BUILD_EVA_INSN("lle", reg, addr)
0057 #define user_sc(reg, addr)      __BUILD_EVA_INSN("sce", reg, addr)
0058 #define user_lw(reg, addr)      __BUILD_EVA_INSN("lwe", reg, addr)
0059 #define user_lwl(reg, addr)     __BUILD_EVA_INSN("lwle", reg, addr)
0060 #define user_lwr(reg, addr)     __BUILD_EVA_INSN("lwre", reg, addr)
0061 #define user_lh(reg, addr)      __BUILD_EVA_INSN("lhe", reg, addr)
0062 #define user_lb(reg, addr)      __BUILD_EVA_INSN("lbe", reg, addr)
0063 #define user_lbu(reg, addr)     __BUILD_EVA_INSN("lbue", reg, addr)
0064 /* No 64-bit EVA instruction for loading double words */
0065 #define user_ld(reg, addr)      user_lw(reg, addr)
0066 #define user_sw(reg, addr)      __BUILD_EVA_INSN("swe", reg, addr)
0067 #define user_swl(reg, addr)     __BUILD_EVA_INSN("swle", reg, addr)
0068 #define user_swr(reg, addr)     __BUILD_EVA_INSN("swre", reg, addr)
0069 #define user_sh(reg, addr)      __BUILD_EVA_INSN("she", reg, addr)
0070 #define user_sb(reg, addr)      __BUILD_EVA_INSN("sbe", reg, addr)
0071 /* No 64-bit EVA instruction for storing double words */
0072 #define user_sd(reg, addr)      user_sw(reg, addr)
0073 
0074 #else
0075 
0076 #define user_cache(op, base)        kernel_cache(op, base)
0077 #define user_pref(hint, base)       kernel_pref(hint, base)
0078 #define user_ll(reg, addr)      kernel_ll(reg, addr)
0079 #define user_sc(reg, addr)      kernel_sc(reg, addr)
0080 #define user_lw(reg, addr)      kernel_lw(reg, addr)
0081 #define user_lwl(reg, addr)     kernel_lwl(reg, addr)
0082 #define user_lwr(reg, addr)     kernel_lwr(reg, addr)
0083 #define user_lh(reg, addr)      kernel_lh(reg, addr)
0084 #define user_lb(reg, addr)      kernel_lb(reg, addr)
0085 #define user_lbu(reg, addr)     kernel_lbu(reg, addr)
0086 #define user_sw(reg, addr)      kernel_sw(reg, addr)
0087 #define user_swl(reg, addr)     kernel_swl(reg, addr)
0088 #define user_swr(reg, addr)     kernel_swr(reg, addr)
0089 #define user_sh(reg, addr)      kernel_sh(reg, addr)
0090 #define user_sb(reg, addr)      kernel_sb(reg, addr)
0091 
0092 #ifdef CONFIG_32BIT
0093 #define user_sd(reg, addr)      kernel_sw(reg, addr)
0094 #define user_ld(reg, addr)      kernel_lw(reg, addr)
0095 #else
0096 #define user_sd(reg, addr)      kernel_sd(reg, addr)
0097 #define user_ld(reg, addr)      kernel_ld(reg, addr)
0098 #endif /* CONFIG_32BIT */
0099 
0100 #endif /* CONFIG_EVA */
0101 
0102 #else /* __ASSEMBLY__ */
0103 
0104 #define kernel_cache(op, base)      cache op, base
0105 #define kernel_pref(hint, base)     pref hint, base
0106 #define kernel_ll(reg, addr)        ll reg, addr
0107 #define kernel_sc(reg, addr)        sc reg, addr
0108 #define kernel_lw(reg, addr)        lw reg, addr
0109 #define kernel_lwl(reg, addr)       lwl reg, addr
0110 #define kernel_lwr(reg, addr)       lwr reg, addr
0111 #define kernel_lh(reg, addr)        lh reg, addr
0112 #define kernel_lb(reg, addr)        lb reg, addr
0113 #define kernel_lbu(reg, addr)       lbu reg, addr
0114 #define kernel_sw(reg, addr)        sw reg, addr
0115 #define kernel_swl(reg, addr)       swl reg, addr
0116 #define kernel_swr(reg, addr)       swr reg, addr
0117 #define kernel_sh(reg, addr)        sh reg, addr
0118 #define kernel_sb(reg, addr)        sb reg, addr
0119 
0120 #ifdef CONFIG_32BIT
0121 /*
0122  * No 'sd' or 'ld' instructions in 32-bit but the code will
0123  * do the correct thing
0124  */
0125 #define kernel_sd(reg, addr)        user_sw(reg, addr)
0126 #define kernel_ld(reg, addr)        user_lw(reg, addr)
0127 #else
0128 #define kernel_sd(reg, addr)        sd reg, addr
0129 #define kernel_ld(reg, addr)        ld reg, addr
0130 #endif /* CONFIG_32BIT */
0131 
0132 #ifdef CONFIG_EVA
0133 
0134 #define __BUILD_EVA_INSN(insn, reg, addr)           \
0135                 .set    push;           \
0136                 .set    mips0;          \
0137                 .set    eva;            \
0138                 insn reg, addr;         \
0139                 .set    pop;
0140 
0141 #define user_cache(op, base)        __BUILD_EVA_INSN(cachee, op, base)
0142 #define user_pref(hint, base)       __BUILD_EVA_INSN(prefe, hint, base)
0143 #define user_ll(reg, addr)      __BUILD_EVA_INSN(lle, reg, addr)
0144 #define user_sc(reg, addr)      __BUILD_EVA_INSN(sce, reg, addr)
0145 #define user_lw(reg, addr)      __BUILD_EVA_INSN(lwe, reg, addr)
0146 #define user_lwl(reg, addr)     __BUILD_EVA_INSN(lwle, reg, addr)
0147 #define user_lwr(reg, addr)     __BUILD_EVA_INSN(lwre, reg, addr)
0148 #define user_lh(reg, addr)      __BUILD_EVA_INSN(lhe, reg, addr)
0149 #define user_lb(reg, addr)      __BUILD_EVA_INSN(lbe, reg, addr)
0150 #define user_lbu(reg, addr)     __BUILD_EVA_INSN(lbue, reg, addr)
0151 /* No 64-bit EVA instruction for loading double words */
0152 #define user_ld(reg, addr)      user_lw(reg, addr)
0153 #define user_sw(reg, addr)      __BUILD_EVA_INSN(swe, reg, addr)
0154 #define user_swl(reg, addr)     __BUILD_EVA_INSN(swle, reg, addr)
0155 #define user_swr(reg, addr)     __BUILD_EVA_INSN(swre, reg, addr)
0156 #define user_sh(reg, addr)      __BUILD_EVA_INSN(she, reg, addr)
0157 #define user_sb(reg, addr)      __BUILD_EVA_INSN(sbe, reg, addr)
0158 /* No 64-bit EVA instruction for loading double words */
0159 #define user_sd(reg, addr)      user_sw(reg, addr)
0160 #else
0161 
0162 #define user_cache(op, base)        kernel_cache(op, base)
0163 #define user_pref(hint, base)       kernel_pref(hint, base)
0164 #define user_ll(reg, addr)      kernel_ll(reg, addr)
0165 #define user_sc(reg, addr)      kernel_sc(reg, addr)
0166 #define user_lw(reg, addr)      kernel_lw(reg, addr)
0167 #define user_lwl(reg, addr)     kernel_lwl(reg, addr)
0168 #define user_lwr(reg, addr)     kernel_lwr(reg, addr)
0169 #define user_lh(reg, addr)      kernel_lh(reg, addr)
0170 #define user_lb(reg, addr)      kernel_lb(reg, addr)
0171 #define user_lbu(reg, addr)     kernel_lbu(reg, addr)
0172 #define user_sw(reg, addr)      kernel_sw(reg, addr)
0173 #define user_swl(reg, addr)     kernel_swl(reg, addr)
0174 #define user_swr(reg, addr)     kernel_swr(reg, addr)
0175 #define user_sh(reg, addr)      kernel_sh(reg, addr)
0176 #define user_sb(reg, addr)      kernel_sb(reg, addr)
0177 
0178 #ifdef CONFIG_32BIT
0179 #define user_sd(reg, addr)      kernel_sw(reg, addr)
0180 #define user_ld(reg, addr)      kernel_lw(reg, addr)
0181 #else
0182 #define user_sd(reg, addr)      kernel_sd(reg, addr)
0183 #define user_ld(reg, addr)      kernel_ld(reg, addr)
0184 #endif /* CONFIG_32BIT */
0185 
0186 #endif /* CONFIG_EVA */
0187 
0188 #endif /* __ASSEMBLY__ */
0189 
0190 #endif /* __ASM_ASM_EVA_H */
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