Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2016 Imagination Technologies
0004  * Author: Paul Burton <paul.burton@mips.com>
0005  */
0006 
0007 #include <linux/clk.h>
0008 #include <linux/clk-provider.h>
0009 #include <linux/clocksource.h>
0010 #include <linux/init.h>
0011 #include <linux/types.h>
0012 
0013 #include <asm/irq.h>
0014 #include <asm/mips-cps.h>
0015 #include <asm/time.h>
0016 
0017 int get_c0_fdc_int(void)
0018 {
0019     int mips_cpu_fdc_irq;
0020 
0021     if (mips_gic_present())
0022         mips_cpu_fdc_irq = gic_get_c0_fdc_int();
0023     else if (cpu_has_veic)
0024         panic("Unimplemented!");
0025     else if (cp0_fdc_irq >= 0)
0026         mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq;
0027     else
0028         mips_cpu_fdc_irq = -1;
0029 
0030     return mips_cpu_fdc_irq;
0031 }
0032 
0033 int get_c0_perfcount_int(void)
0034 {
0035     int mips_cpu_perf_irq;
0036 
0037     if (mips_gic_present())
0038         mips_cpu_perf_irq = gic_get_c0_perfcount_int();
0039     else if (cpu_has_veic)
0040         panic("Unimplemented!");
0041     else if (cp0_perfcount_irq >= 0)
0042         mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
0043     else
0044         mips_cpu_perf_irq = -1;
0045 
0046     return mips_cpu_perf_irq;
0047 }
0048 
0049 unsigned int get_c0_compare_int(void)
0050 {
0051     int mips_cpu_timer_irq;
0052 
0053     if (mips_gic_present())
0054         mips_cpu_timer_irq = gic_get_c0_compare_int();
0055     else if (cpu_has_veic)
0056         panic("Unimplemented!");
0057     else
0058         mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
0059 
0060     return mips_cpu_timer_irq;
0061 }