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0007 #include <linux/clk.h>
0008 #include <linux/clocksource.h>
0009 #include <linux/init.h>
0010 #include <linux/irqchip.h>
0011 #include <linux/of_clk.h>
0012 #include <linux/of_fdt.h>
0013
0014 #include <asm/bootinfo.h>
0015 #include <asm/fw/fw.h>
0016 #include <asm/irq_cpu.h>
0017 #include <asm/machine.h>
0018 #include <asm/mips-cps.h>
0019 #include <asm/prom.h>
0020 #include <asm/smp-ops.h>
0021 #include <asm/time.h>
0022
0023 static __initconst const void *fdt;
0024 static __initconst const struct mips_machine *mach;
0025 static __initconst const void *mach_match_data;
0026
0027 void __init prom_init(void)
0028 {
0029 plat_get_fdt();
0030 BUG_ON(!fdt);
0031 }
0032
0033 void __init *plat_get_fdt(void)
0034 {
0035 const struct mips_machine *check_mach;
0036 const struct of_device_id *match;
0037
0038 if (fdt)
0039
0040 return (void *)fdt;
0041
0042 fdt = (void *)get_fdt();
0043 if (fdt && !fdt_check_header(fdt)) {
0044
0045
0046
0047
0048
0049 for_each_mips_machine(check_mach) {
0050 match = mips_machine_is_compatible(check_mach, fdt);
0051 if (match) {
0052 mach = check_mach;
0053 mach_match_data = match->data;
0054 break;
0055 }
0056 }
0057 } else if (IS_ENABLED(CONFIG_LEGACY_BOARDS)) {
0058
0059
0060
0061
0062
0063 for_each_mips_machine(check_mach) {
0064 if (!check_mach->detect)
0065 continue;
0066
0067 if (!check_mach->detect())
0068 continue;
0069
0070 mach = check_mach;
0071 }
0072
0073
0074
0075
0076
0077 BUG_ON(!mach);
0078
0079
0080 fdt = mach->fdt;
0081 }
0082 return (void *)fdt;
0083 }
0084
0085 #ifdef CONFIG_RELOCATABLE
0086
0087 void __init plat_fdt_relocated(void *new_location)
0088 {
0089
0090
0091
0092
0093
0094 fdt = NULL;
0095
0096 if (fw_arg0 == -2)
0097 fw_arg1 = (unsigned long)new_location;
0098 }
0099
0100 #endif
0101
0102 void __init plat_mem_setup(void)
0103 {
0104 if (mach && mach->fixup_fdt)
0105 fdt = mach->fixup_fdt(fdt, mach_match_data);
0106
0107 fw_init_cmdline();
0108 __dt_setup_arch((void *)fdt);
0109 }
0110
0111 void __init device_tree_init(void)
0112 {
0113 unflatten_and_copy_device_tree();
0114 mips_cpc_probe();
0115
0116 if (!register_cps_smp_ops())
0117 return;
0118 if (!register_vsmp_smp_ops())
0119 return;
0120
0121 register_up_smp_ops();
0122 }
0123
0124 int __init apply_mips_fdt_fixups(void *fdt_out, size_t fdt_out_size,
0125 const void *fdt_in,
0126 const struct mips_fdt_fixup *fixups)
0127 {
0128 int err;
0129
0130 err = fdt_open_into(fdt_in, fdt_out, fdt_out_size);
0131 if (err) {
0132 pr_err("Failed to open FDT\n");
0133 return err;
0134 }
0135
0136 for (; fixups->apply; fixups++) {
0137 err = fixups->apply(fdt_out);
0138 if (err) {
0139 pr_err("Failed to apply FDT fixup \"%s\"\n",
0140 fixups->description);
0141 return err;
0142 }
0143 }
0144
0145 err = fdt_pack(fdt_out);
0146 if (err)
0147 pr_err("Failed to pack FDT\n");
0148 return err;
0149 }
0150
0151 void __init plat_time_init(void)
0152 {
0153 struct device_node *np;
0154 struct clk *clk;
0155
0156 of_clk_init(NULL);
0157
0158 if (!cpu_has_counter) {
0159 mips_hpt_frequency = 0;
0160 } else if (mach && mach->measure_hpt_freq) {
0161 mips_hpt_frequency = mach->measure_hpt_freq();
0162 } else {
0163 np = of_get_cpu_node(0, NULL);
0164 if (!np) {
0165 pr_err("Failed to get CPU node\n");
0166 return;
0167 }
0168
0169 clk = of_clk_get(np, 0);
0170 if (IS_ERR(clk)) {
0171 pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
0172 return;
0173 }
0174
0175 mips_hpt_frequency = clk_get_rate(clk);
0176 clk_put(clk);
0177
0178 switch (boot_cpu_type()) {
0179 case CPU_20KC:
0180 case CPU_25KF:
0181
0182 break;
0183 default:
0184
0185 mips_hpt_frequency /= 2;
0186 break;
0187 }
0188 }
0189
0190 timer_probe();
0191 }
0192
0193 void __init arch_init_irq(void)
0194 {
0195 struct device_node *intc_node;
0196
0197 intc_node = of_find_compatible_node(NULL, NULL,
0198 "mti,cpu-interrupt-controller");
0199 if (!cpu_has_veic && !intc_node)
0200 mips_cpu_irq_init();
0201 of_node_put(intc_node);
0202
0203 irqchip_init();
0204 }