mips/generic/board-ocelot.c

0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003  * Microsemi MIPS SoC support
0004  *
0005  * Copyright (c) 2017 Microsemi Corporation
0006  */
0007 #include <asm/machine.h>
0008 #include <asm/prom.h>
0009
0010 #define DEVCPU_GCB_CHIP_REGS_CHIP_ID    0x71070000
0011 #define CHIP_ID_PART_ID         GENMASK(27, 12)
0012
0013 #define OCELOT_PART_ID          (0x7514 << 12)
0014
0015 #define UART_UART           0x70100000
0016
0017 static __init bool ocelot_detect(void)
0018 {
0019     u32 rev;
0020     int idx;
0021
0022     /* Look for the TLB entry set up by redboot before trying to use it */
0023     write_c0_entryhi(DEVCPU_GCB_CHIP_REGS_CHIP_ID);
0024     mtc0_tlbw_hazard();
0025     tlb_probe();
0026     tlb_probe_hazard();
0027     idx = read_c0_index();
0028     if (idx < 0)
0029         return false;
0030
0031     /* A TLB entry exists, lets assume its usable and check the CHIP ID */
0032     rev = __raw_readl((void __iomem *)DEVCPU_GCB_CHIP_REGS_CHIP_ID);
0033
0034     if ((rev & CHIP_ID_PART_ID) != OCELOT_PART_ID)
0035         return false;
0036
0037     /* Copy command line from bootloader early for Initrd detection */
0038     if (fw_arg0 < 10 && (fw_arg1 & 0xFFF00000) == 0x80000000) {
0039         unsigned int prom_argc = fw_arg0;
0040         const char **prom_argv = (const char **)fw_arg1;
0041
0042         if (prom_argc > 1 && strlen(prom_argv[1]) > 0)
0043             /* ignore all built-in args if any f/w args given */
0044             strcpy(arcs_cmdline, prom_argv[1]);
0045     }
0046
0047     return true;
0048 }
0049
0050 static void __init ocelot_earlyprintk_init(void)
0051 {
0052     void __iomem *uart_base;
0053
0054     uart_base = ioremap(UART_UART, 0x20);
0055     setup_8250_early_printk_port((unsigned long)uart_base, 2, 50000);
0056 }
0057
0058 static void __init ocelot_late_init(void)
0059 {
0060     ocelot_earlyprintk_init();
0061 }
0062
0063 static __init const void *ocelot_fixup_fdt(const void *fdt,
0064                        const void *match_data)
0065 {
0066     /* This has to be done so late because ioremap needs to work */
0067     late_time_init = ocelot_late_init;
0068
0069     return fdt;
0070 }
0071
0072 extern char __dtb_ocelot_pcb123_begin[];
0073
0074 MIPS_MACHINE(ocelot) = {
0075     .fdt = __dtb_ocelot_pcb123_begin,
0076     .fixup_fdt = ocelot_fixup_fdt,
0077     .detect = ocelot_detect,
0078 };