Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Support for Ingenic SoCs
0004  *
0005  * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
0006  * Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
0007  * Copyright (C) 2020 Paul Cercueil <paul@crapouillou.net>
0008  */
0009 
0010 #include <linux/clk.h>
0011 #include <linux/of.h>
0012 #include <linux/of_address.h>
0013 #include <linux/of_fdt.h>
0014 #include <linux/pm.h>
0015 #include <linux/sizes.h>
0016 #include <linux/suspend.h>
0017 #include <linux/types.h>
0018 
0019 #include <asm/bootinfo.h>
0020 #include <asm/machine.h>
0021 #include <asm/reboot.h>
0022 
0023 static __init char *ingenic_get_system_type(unsigned long machtype)
0024 {
0025     switch (machtype) {
0026     case MACH_INGENIC_X2100:
0027         return "X2100";
0028     case MACH_INGENIC_X2000H:
0029         return "X2000H";
0030     case MACH_INGENIC_X2000E:
0031         return "X2000E";
0032     case MACH_INGENIC_X2000:
0033         return "X2000";
0034     case MACH_INGENIC_X1830:
0035         return "X1830";
0036     case MACH_INGENIC_X1000E:
0037         return "X1000E";
0038     case MACH_INGENIC_X1000:
0039         return "X1000";
0040     case MACH_INGENIC_JZ4780:
0041         return "JZ4780";
0042     case MACH_INGENIC_JZ4775:
0043         return "JZ4775";
0044     case MACH_INGENIC_JZ4770:
0045         return "JZ4770";
0046     case MACH_INGENIC_JZ4760B:
0047         return "JZ4760B";
0048     case MACH_INGENIC_JZ4760:
0049         return "JZ4760";
0050     case MACH_INGENIC_JZ4755:
0051         return "JZ4755";
0052     case MACH_INGENIC_JZ4750:
0053         return "JZ4750";
0054     case MACH_INGENIC_JZ4725B:
0055         return "JZ4725B";
0056     case MACH_INGENIC_JZ4730:
0057         return "JZ4730";
0058     default:
0059         return "JZ4740";
0060     }
0061 }
0062 
0063 static __init const void *ingenic_fixup_fdt(const void *fdt, const void *match_data)
0064 {
0065     /*
0066      * Old devicetree files for the qi,lb60 board did not have a /memory
0067      * node. Hardcode the memory info here.
0068      */
0069     if (!fdt_node_check_compatible(fdt, 0, "qi,lb60") &&
0070         fdt_path_offset(fdt, "/memory") < 0)
0071         early_init_dt_add_memory_arch(0, SZ_32M);
0072 
0073     mips_machtype = (unsigned long)match_data;
0074     system_type = ingenic_get_system_type(mips_machtype);
0075 
0076     return fdt;
0077 }
0078 
0079 static const struct of_device_id ingenic_of_match[] __initconst = {
0080     { .compatible = "ingenic,jz4730", .data = (void *)MACH_INGENIC_JZ4730 },
0081     { .compatible = "ingenic,jz4740", .data = (void *)MACH_INGENIC_JZ4740 },
0082     { .compatible = "ingenic,jz4725b", .data = (void *)MACH_INGENIC_JZ4725B },
0083     { .compatible = "ingenic,jz4750", .data = (void *)MACH_INGENIC_JZ4750 },
0084     { .compatible = "ingenic,jz4755", .data = (void *)MACH_INGENIC_JZ4755 },
0085     { .compatible = "ingenic,jz4760", .data = (void *)MACH_INGENIC_JZ4760 },
0086     { .compatible = "ingenic,jz4760b", .data = (void *)MACH_INGENIC_JZ4760B },
0087     { .compatible = "ingenic,jz4770", .data = (void *)MACH_INGENIC_JZ4770 },
0088     { .compatible = "ingenic,jz4775", .data = (void *)MACH_INGENIC_JZ4775 },
0089     { .compatible = "ingenic,jz4780", .data = (void *)MACH_INGENIC_JZ4780 },
0090     { .compatible = "ingenic,x1000", .data = (void *)MACH_INGENIC_X1000 },
0091     { .compatible = "ingenic,x1000e", .data = (void *)MACH_INGENIC_X1000E },
0092     { .compatible = "ingenic,x1830", .data = (void *)MACH_INGENIC_X1830 },
0093     { .compatible = "ingenic,x2000", .data = (void *)MACH_INGENIC_X2000 },
0094     { .compatible = "ingenic,x2000e", .data = (void *)MACH_INGENIC_X2000E },
0095     { .compatible = "ingenic,x2000h", .data = (void *)MACH_INGENIC_X2000H },
0096     { .compatible = "ingenic,x2100", .data = (void *)MACH_INGENIC_X2100 },
0097     {}
0098 };
0099 
0100 MIPS_MACHINE(ingenic) = {
0101     .matches = ingenic_of_match,
0102     .fixup_fdt = ingenic_fixup_fdt,
0103 };
0104 
0105 static void ingenic_wait_instr(void)
0106 {
0107     __asm__(".set push;\n"
0108         ".set mips3;\n"
0109         "wait;\n"
0110         ".set pop;\n"
0111     );
0112 }
0113 
0114 static void ingenic_halt(void)
0115 {
0116     for (;;)
0117         ingenic_wait_instr();
0118 }
0119 
0120 static int __maybe_unused ingenic_pm_enter(suspend_state_t state)
0121 {
0122     ingenic_wait_instr();
0123 
0124     return 0;
0125 }
0126 
0127 static const struct platform_suspend_ops ingenic_pm_ops __maybe_unused = {
0128     .valid = suspend_valid_only_mem,
0129     .enter = ingenic_pm_enter,
0130 };
0131 
0132 static int __init ingenic_pm_init(void)
0133 {
0134     if (boot_cpu_type() == CPU_XBURST) {
0135         if (IS_ENABLED(CONFIG_PM_SLEEP))
0136             suspend_set_ops(&ingenic_pm_ops);
0137         _machine_halt = ingenic_halt;
0138     }
0139 
0140     return 0;
0141 
0142 }
0143 late_initcall(ingenic_pm_init);