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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  *  O32 interface for the 64 (or N32) ABI.
0004  *
0005  *  Copyright (C) 2002, 2014  Maciej W. Rozycki
0006  */
0007 
0008 #include <asm/asm.h>
0009 #include <asm/regdef.h>
0010 
0011 /* O32 register size.  */
0012 #define O32_SZREG   4
0013 /* Maximum number of arguments supported.  Must be even!  */
0014 #define O32_ARGC    32
0015 /* Number of static registers we save.  */
0016 #define O32_STATC   11
0017 /* Argument area frame size.  */
0018 #define O32_ARGSZ   (O32_SZREG * O32_ARGC)
0019 /* Static register save area frame size.  */
0020 #define O32_STATSZ  (SZREG * O32_STATC)
0021 /* Stack pointer register save area frame size.  */
0022 #define O32_SPSZ    SZREG
0023 /* Combined area frame size.  */
0024 #define O32_FRAMESZ (O32_ARGSZ + O32_SPSZ + O32_STATSZ)
0025 /* Switched stack frame size.  */
0026 #define O32_NFRAMESZ    (O32_ARGSZ + O32_SPSZ)
0027 
0028         .text
0029 
0030 /*
0031  * O32 function call dispatcher, for interfacing 32-bit ROM routines.
0032  *
0033  * The standard 64 (N32) calling sequence is supported, with a0 holding
0034  * a function pointer, a1 a pointer to the new stack to call the
0035  * function with or 0 if no stack switching is requested, a2-a7 -- the
0036  * function call's first six arguments, and the stack -- the remaining
0037  * arguments (up to O32_ARGC, including a2-a7).  Static registers, gp
0038  * and fp are preserved, v0 holds the result.  This code relies on the
0039  * called o32 function for sp and ra restoration and this dispatcher has
0040  * to be placed in a KSEGx (or KUSEG) address space.  Any pointers
0041  * passed have to point to addresses within one of these spaces as well.
0042  */
0043 NESTED(call_o32, O32_FRAMESZ, ra)
0044         REG_SUBU    sp,O32_FRAMESZ
0045 
0046         REG_S       ra,O32_FRAMESZ-1*SZREG(sp)
0047         REG_S       fp,O32_FRAMESZ-2*SZREG(sp)
0048         REG_S       gp,O32_FRAMESZ-3*SZREG(sp)
0049         REG_S       s7,O32_FRAMESZ-4*SZREG(sp)
0050         REG_S       s6,O32_FRAMESZ-5*SZREG(sp)
0051         REG_S       s5,O32_FRAMESZ-6*SZREG(sp)
0052         REG_S       s4,O32_FRAMESZ-7*SZREG(sp)
0053         REG_S       s3,O32_FRAMESZ-8*SZREG(sp)
0054         REG_S       s2,O32_FRAMESZ-9*SZREG(sp)
0055         REG_S       s1,O32_FRAMESZ-10*SZREG(sp)
0056         REG_S       s0,O32_FRAMESZ-11*SZREG(sp)
0057 
0058         move        jp,a0
0059 
0060         move        fp,sp
0061         beqz        a1,0f
0062         REG_SUBU    fp,a1,O32_NFRAMESZ
0063 0:
0064         REG_S       sp,O32_NFRAMESZ-1*SZREG(fp)
0065 
0066         sll     a0,a2,zero
0067         sll     a1,a3,zero
0068         sll     a2,a4,zero
0069         sll     a3,a5,zero
0070         sw      a6,4*O32_SZREG(fp)
0071         sw      a7,5*O32_SZREG(fp)
0072 
0073         PTR_LA      t0,O32_FRAMESZ(sp)
0074         PTR_LA      t1,6*O32_SZREG(fp)
0075         li      t2,O32_ARGC-6
0076 1:
0077         lw      t3,(t0)
0078         REG_ADDU    t0,SZREG
0079         sw      t3,(t1)
0080         REG_SUBU    t2,1
0081         REG_ADDU    t1,O32_SZREG
0082         bnez        t2,1b
0083 
0084         move        sp,fp
0085 
0086         jalr        jp
0087 
0088         REG_L       sp,O32_NFRAMESZ-1*SZREG(sp)
0089 
0090         REG_L       s0,O32_FRAMESZ-11*SZREG(sp)
0091         REG_L       s1,O32_FRAMESZ-10*SZREG(sp)
0092         REG_L       s2,O32_FRAMESZ-9*SZREG(sp)
0093         REG_L       s3,O32_FRAMESZ-8*SZREG(sp)
0094         REG_L       s4,O32_FRAMESZ-7*SZREG(sp)
0095         REG_L       s5,O32_FRAMESZ-6*SZREG(sp)
0096         REG_L       s6,O32_FRAMESZ-5*SZREG(sp)
0097         REG_L       s7,O32_FRAMESZ-4*SZREG(sp)
0098         REG_L       gp,O32_FRAMESZ-3*SZREG(sp)
0099         REG_L       fp,O32_FRAMESZ-2*SZREG(sp)
0100         REG_L       ra,O32_FRAMESZ-1*SZREG(sp)
0101 
0102         REG_ADDU    sp,O32_FRAMESZ
0103         jr      ra
0104 END(call_o32)