mips/cobalt/pci.c

0001 /*
0002  * Register PCI controller.
0003  *
0004  * This file is subject to the terms and conditions of the GNU General Public
0005  * License.  See the file "COPYING" in the main directory of this archive
0006  * for more details.
0007  *
0008  * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
0009  * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
0010  *
0011  */
0012 #include <linux/init.h>
0013 #include <linux/pci.h>
0014
0015 #include <asm/gt64120.h>
0016
0017 extern struct pci_ops gt64xxx_pci0_ops;
0018
0019 static struct resource cobalt_mem_resource = {
0020     .start  = GT_DEF_PCI0_MEM0_BASE,
0021     .end    = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
0022     .name   = "PCI memory",
0023     .flags  = IORESOURCE_MEM,
0024 };
0025
0026 static struct resource cobalt_io_resource = {
0027     .start  = 0x1000,
0028     .end    = 0xffffffUL,
0029     .name   = "PCI I/O",
0030     .flags  = IORESOURCE_IO,
0031 };
0032
0033 static struct pci_controller cobalt_pci_controller = {
0034     .pci_ops    = &gt64xxx_pci0_ops,
0035     .mem_resource   = &cobalt_mem_resource,
0036     .io_resource    = &cobalt_io_resource,
0037     .io_offset  = 0 - GT_DEF_PCI0_IO_BASE,
0038     .io_map_base    = CKSEG1ADDR(GT_DEF_PCI0_IO_BASE),
0039 };
0040
0041 static int __init cobalt_pci_init(void)
0042 {
0043     register_pci_controller(&cobalt_pci_controller);
0044
0045     return 0;
0046 }
0047
0048 arch_initcall(cobalt_pci_init);