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0032 #include <asm/octeon/octeon.h>
0033
0034 #include <asm/octeon/cvmx-config.h>
0035 #include <asm/octeon/cvmx-spi.h>
0036 #include <asm/octeon/cvmx-helper.h>
0037
0038 #include <asm/octeon/cvmx-pip-defs.h>
0039 #include <asm/octeon/cvmx-pko-defs.h>
0040 #include <asm/octeon/cvmx-spxx-defs.h>
0041 #include <asm/octeon/cvmx-stxx-defs.h>
0042
0043
0044
0045
0046
0047
0048 #ifndef CVMX_HELPER_SPI_TIMEOUT
0049 #define CVMX_HELPER_SPI_TIMEOUT 10
0050 #endif
0051
0052 int __cvmx_helper_spi_enumerate(int interface)
0053 {
0054 if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&
0055 cvmx_spi4000_is_present(interface)) {
0056 return 10;
0057 } else {
0058 return 16;
0059 }
0060 }
0061
0062
0063
0064
0065
0066
0067
0068
0069
0070
0071 int __cvmx_helper_spi_probe(int interface)
0072 {
0073 int num_ports = 0;
0074
0075 if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&
0076 cvmx_spi4000_is_present(interface)) {
0077 num_ports = 10;
0078 } else {
0079 union cvmx_pko_reg_crc_enable enable;
0080 num_ports = 16;
0081
0082
0083
0084
0085
0086
0087 enable.u64 = cvmx_read_csr(CVMX_PKO_REG_CRC_ENABLE);
0088 enable.s.enable |= 0xffff << (interface * 16);
0089 cvmx_write_csr(CVMX_PKO_REG_CRC_ENABLE, enable.u64);
0090 }
0091 __cvmx_helper_setup_gmx(interface, num_ports);
0092 return num_ports;
0093 }
0094
0095
0096
0097
0098
0099
0100
0101
0102
0103
0104 int __cvmx_helper_spi_enable(int interface)
0105 {
0106
0107
0108
0109
0110
0111 int num_ports = cvmx_helper_ports_on_interface(interface);
0112 int ipd_port;
0113 for (ipd_port = interface * 16; ipd_port < interface * 16 + num_ports;
0114 ipd_port++) {
0115 union cvmx_pip_prt_cfgx port_config;
0116 port_config.u64 = cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
0117 port_config.s.crc_en = 1;
0118 cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_config.u64);
0119 }
0120
0121 if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {
0122 cvmx_spi_start_interface(interface, CVMX_SPI_MODE_DUPLEX,
0123 CVMX_HELPER_SPI_TIMEOUT, num_ports);
0124 if (cvmx_spi4000_is_present(interface))
0125 cvmx_spi4000_initialize(interface);
0126 }
0127 __cvmx_interrupt_spxx_int_msk_enable(interface);
0128 __cvmx_interrupt_stxx_int_msk_enable(interface);
0129 __cvmx_interrupt_gmxx_enable(interface);
0130 return 0;
0131 }
0132
0133
0134
0135
0136
0137
0138
0139
0140
0141
0142
0143 union cvmx_helper_link_info __cvmx_helper_spi_link_get(int ipd_port)
0144 {
0145 union cvmx_helper_link_info result;
0146 int interface = cvmx_helper_get_interface_num(ipd_port);
0147 int index = cvmx_helper_get_interface_index_num(ipd_port);
0148 result.u64 = 0;
0149
0150 if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
0151
0152 result.s.link_up = 1;
0153 result.s.full_duplex = 1;
0154 result.s.speed = 10000;
0155 } else if (cvmx_spi4000_is_present(interface)) {
0156 union cvmx_gmxx_rxx_rx_inbnd inband =
0157 cvmx_spi4000_check_speed(interface, index);
0158 result.s.link_up = inband.s.status;
0159 result.s.full_duplex = inband.s.duplex;
0160 switch (inband.s.speed) {
0161 case 0:
0162 result.s.speed = 10;
0163 break;
0164 case 1:
0165 result.s.speed = 100;
0166 break;
0167 case 2:
0168 result.s.speed = 1000;
0169 break;
0170 case 3:
0171 result.s.speed = 0;
0172 result.s.link_up = 0;
0173 break;
0174 }
0175 } else {
0176
0177
0178 result.s.link_up = 1;
0179 result.s.full_duplex = 1;
0180 result.s.speed = 10000;
0181 }
0182 return result;
0183 }
0184
0185
0186
0187
0188
0189
0190
0191
0192
0193
0194
0195
0196 int __cvmx_helper_spi_link_set(int ipd_port, union cvmx_helper_link_info link_info)
0197 {
0198
0199
0200
0201 return 0;
0202 }