cavium-octeon/executive/cvmx-helper-jtag.c

0001
0002 /***********************license start***************
0003  * Author: Cavium Networks
0004  *
0005  * Contact: support@caviumnetworks.com
0006  * This file is part of the OCTEON SDK
0007  *
0008  * Copyright (c) 2003-2008 Cavium Networks
0009  *
0010  * This file is free software; you can redistribute it and/or modify
0011  * it under the terms of the GNU General Public License, Version 2, as
0012  * published by the Free Software Foundation.
0013  *
0014  * This file is distributed in the hope that it will be useful, but
0015  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
0016  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
0017  * NONINFRINGEMENT.  See the GNU General Public License for more
0018  * details.
0019  *
0020  * You should have received a copy of the GNU General Public License
0021  * along with this file; if not, write to the Free Software
0022  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
0023  * or visit http://www.gnu.org/licenses/.
0024  *
0025  * This file may also be available under a different license from Cavium.
0026  * Contact Cavium Networks for more information
0027  ***********************license end**************************************/
0028
0029 /**
0030  *
0031  * Helper utilities for qlm_jtag.
0032  *
0033  */
0034
0035 #include <asm/octeon/octeon.h>
0036 #include <asm/octeon/cvmx-helper-jtag.h>
0037
0038
0039 /**
0040  * Initialize the internal QLM JTAG logic to allow programming
0041  * of the JTAG chain by the cvmx_helper_qlm_jtag_*() functions.
0042  * These functions should only be used at the direction of Cavium
0043  * Networks. Programming incorrect values into the JTAG chain
0044  * can cause chip damage.
0045  */
0046 void cvmx_helper_qlm_jtag_init(void)
0047 {
0048     union cvmx_ciu_qlm_jtgc jtgc;
0049     uint32_t clock_div = 0;
0050     uint32_t divisor = cvmx_sysinfo_get()->cpu_clock_hz / (25 * 1000000);
0051     divisor = (divisor - 1) >> 2;
0052     /* Convert the divisor into a power of 2 shift */
0053     while (divisor) {
0054         clock_div++;
0055         divisor = divisor >> 1;
0056     }
0057
0058     /*
0059      * Clock divider for QLM JTAG operations.  eclk is divided by
0060      * 2^(CLK_DIV + 2)
0061      */
0062     jtgc.u64 = 0;
0063     jtgc.s.clk_div = clock_div;
0064     jtgc.s.mux_sel = 0;
0065     if (OCTEON_IS_MODEL(OCTEON_CN52XX))
0066         jtgc.s.bypass = 0x3;
0067     else
0068         jtgc.s.bypass = 0xf;
0069     cvmx_write_csr(CVMX_CIU_QLM_JTGC, jtgc.u64);
0070     cvmx_read_csr(CVMX_CIU_QLM_JTGC);
0071 }
0072
0073 /**
0074  * Write up to 32bits into the QLM jtag chain. Bits are shifted
0075  * into the MSB and out the LSB, so you should shift in the low
0076  * order bits followed by the high order bits. The JTAG chain is
0077  * 4 * 268 bits long, or 1072.
0078  *
0079  * @qlm:    QLM to shift value into
0080  * @bits:   Number of bits to shift in (1-32).
0081  * @data:   Data to shift in. Bit 0 enters the chain first, followed by
0082  *       bit 1, etc.
0083  *
0084  * Returns The low order bits of the JTAG chain that shifted out of the
0085  *     circle.
0086  */
0087 uint32_t cvmx_helper_qlm_jtag_shift(int qlm, int bits, uint32_t data)
0088 {
0089     union cvmx_ciu_qlm_jtgd jtgd;
0090     jtgd.u64 = 0;
0091     jtgd.s.shift = 1;
0092     jtgd.s.shft_cnt = bits - 1;
0093     jtgd.s.shft_reg = data;
0094     if (!OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X))
0095         jtgd.s.select = 1 << qlm;
0096     cvmx_write_csr(CVMX_CIU_QLM_JTGD, jtgd.u64);
0097     do {
0098         jtgd.u64 = cvmx_read_csr(CVMX_CIU_QLM_JTGD);
0099     } while (jtgd.s.shift);
0100     return jtgd.s.shft_reg >> (32 - bits);
0101 }
0102
0103 /**
0104  * Shift long sequences of zeros into the QLM JTAG chain. It is
0105  * common to need to shift more than 32 bits of zeros into the
0106  * chain. This function is a convience wrapper around
0107  * cvmx_helper_qlm_jtag_shift() to shift more than 32 bits of
0108  * zeros at a time.
0109  *
0110  * @qlm:    QLM to shift zeros into
0111  * @bits:
0112  */
0113 void cvmx_helper_qlm_jtag_shift_zeros(int qlm, int bits)
0114 {
0115     while (bits > 0) {
0116         int n = bits;
0117         if (n > 32)
0118             n = 32;
0119         cvmx_helper_qlm_jtag_shift(qlm, n, 0);
0120         bits -= n;
0121     }
0122 }
0123
0124 /**
0125  * Program the QLM JTAG chain into all lanes of the QLM. You must
0126  * have already shifted in 268*4, or 1072 bits into the JTAG
0127  * chain. Updating invalid values can possibly cause chip damage.
0128  *
0129  * @qlm:    QLM to program
0130  */
0131 void cvmx_helper_qlm_jtag_update(int qlm)
0132 {
0133     union cvmx_ciu_qlm_jtgd jtgd;
0134
0135     /* Update the new data */
0136     jtgd.u64 = 0;
0137     jtgd.s.update = 1;
0138     if (!OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X))
0139         jtgd.s.select = 1 << qlm;
0140     cvmx_write_csr(CVMX_CIU_QLM_JTGD, jtgd.u64);
0141     do {
0142         jtgd.u64 = cvmx_read_csr(CVMX_CIU_QLM_JTGD);
0143     } while (jtgd.s.update);
0144 }