cavium-octeon/executive/cvmx-helper-board.c

0001 /***********************license start***************
0002  * Author: Cavium Networks
0003  *
0004  * Contact: support@caviumnetworks.com
0005  * This file is part of the OCTEON SDK
0006  *
0007  * Copyright (c) 2003-2008 Cavium Networks
0008  *
0009  * This file is free software; you can redistribute it and/or modify
0010  * it under the terms of the GNU General Public License, Version 2, as
0011  * published by the Free Software Foundation.
0012  *
0013  * This file is distributed in the hope that it will be useful, but
0014  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
0015  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
0016  * NONINFRINGEMENT.  See the GNU General Public License for more
0017  * details.
0018  *
0019  * You should have received a copy of the GNU General Public License
0020  * along with this file; if not, write to the Free Software
0021  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
0022  * or visit http://www.gnu.org/licenses/.
0023  *
0024  * This file may also be available under a different license from Cavium.
0025  * Contact Cavium Networks for more information
0026  ***********************license end**************************************/
0027
0028 /*
0029  *
0030  * Helper functions to abstract board specific data about
0031  * network ports from the rest of the cvmx-helper files.
0032  */
0033
0034 #include <linux/bug.h>
0035 #include <asm/octeon/octeon.h>
0036 #include <asm/octeon/cvmx-bootinfo.h>
0037
0038 #include <asm/octeon/cvmx-config.h>
0039
0040 #include <asm/octeon/cvmx-helper.h>
0041 #include <asm/octeon/cvmx-helper-util.h>
0042 #include <asm/octeon/cvmx-helper-board.h>
0043
0044 #include <asm/octeon/cvmx-gmxx-defs.h>
0045 #include <asm/octeon/cvmx-asxx-defs.h>
0046
0047 /*
0048  * Return the MII PHY address associated with the given IPD
0049  * port. A result of -1 means there isn't a MII capable PHY
0050  * connected to this port. On chips supporting multiple MII
0051  * busses the bus number is encoded in bits <15:8>.
0052  *
0053  * This function must be modified for every new Octeon board.
0054  * Internally it uses switch statements based on the cvmx_sysinfo
0055  * data to determine board types and revisions. It replies on the
0056  * fact that every Octeon board receives a unique board type
0057  * enumeration from the bootloader.
0058  *
0059  * @ipd_port: Octeon IPD port to get the MII address for.
0060  *
0061  * Returns MII PHY address and bus number or -1.
0062  */
0063 int cvmx_helper_board_get_mii_address(int ipd_port)
0064 {
0065     switch (cvmx_sysinfo_get()->board_type) {
0066     case CVMX_BOARD_TYPE_SIM:
0067         /* Simulator doesn't have MII */
0068         return -1;
0069     case CVMX_BOARD_TYPE_EBT3000:
0070     case CVMX_BOARD_TYPE_EBT5800:
0071     case CVMX_BOARD_TYPE_THUNDER:
0072     case CVMX_BOARD_TYPE_NICPRO2:
0073         /* Interface 0 is SPI4, interface 1 is RGMII */
0074         if ((ipd_port >= 16) && (ipd_port < 20))
0075             return ipd_port - 16;
0076         else
0077             return -1;
0078     case CVMX_BOARD_TYPE_KODAMA:
0079     case CVMX_BOARD_TYPE_EBH3100:
0080     case CVMX_BOARD_TYPE_HIKARI:
0081     case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
0082     case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
0083     case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
0084         /*
0085          * Port 0 is WAN connected to a PHY, Port 1 is GMII
0086          * connected to a switch
0087          */
0088         if (ipd_port == 0)
0089             return 4;
0090         else if (ipd_port == 1)
0091             return 9;
0092         else
0093             return -1;
0094     case CVMX_BOARD_TYPE_NAC38:
0095         /* Board has 8 RGMII ports PHYs are 0-7 */
0096         if ((ipd_port >= 0) && (ipd_port < 4))
0097             return ipd_port;
0098         else if ((ipd_port >= 16) && (ipd_port < 20))
0099             return ipd_port - 16 + 4;
0100         else
0101             return -1;
0102     case CVMX_BOARD_TYPE_EBH3000:
0103         /* Board has dual SPI4 and no PHYs */
0104         return -1;
0105     case CVMX_BOARD_TYPE_EBH5200:
0106     case CVMX_BOARD_TYPE_EBH5201:
0107     case CVMX_BOARD_TYPE_EBT5200:
0108         /* Board has 2 management ports */
0109         if ((ipd_port >= CVMX_HELPER_BOARD_MGMT_IPD_PORT) &&
0110             (ipd_port < (CVMX_HELPER_BOARD_MGMT_IPD_PORT + 2)))
0111             return ipd_port - CVMX_HELPER_BOARD_MGMT_IPD_PORT;
0112         /*
0113          * Board has 4 SGMII ports. The PHYs start right after the MII
0114          * ports MII0 = 0, MII1 = 1, SGMII = 2-5.
0115          */
0116         if ((ipd_port >= 0) && (ipd_port < 4))
0117             return ipd_port + 2;
0118         else
0119             return -1;
0120     case CVMX_BOARD_TYPE_EBH5600:
0121     case CVMX_BOARD_TYPE_EBH5601:
0122     case CVMX_BOARD_TYPE_EBH5610:
0123         /* Board has 1 management port */
0124         if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
0125             return 0;
0126         /*
0127          * Board has 8 SGMII ports. 4 connect out, two connect
0128          * to a switch, and 2 loop to each other
0129          */
0130         if ((ipd_port >= 0) && (ipd_port < 4))
0131             return ipd_port + 1;
0132         else
0133             return -1;
0134     case CVMX_BOARD_TYPE_CUST_NB5:
0135         if (ipd_port == 2)
0136             return 4;
0137         else
0138             return -1;
0139     case CVMX_BOARD_TYPE_NIC_XLE_4G:
0140         /* Board has 4 SGMII ports. connected QLM3(interface 1) */
0141         if ((ipd_port >= 16) && (ipd_port < 20))
0142             return ipd_port - 16 + 1;
0143         else
0144             return -1;
0145     case CVMX_BOARD_TYPE_NIC_XLE_10G:
0146     case CVMX_BOARD_TYPE_NIC10E:
0147         return -1;
0148     case CVMX_BOARD_TYPE_NIC4E:
0149         if (ipd_port >= 0 && ipd_port <= 3)
0150             return (ipd_port + 0x1f) & 0x1f;
0151         else
0152             return -1;
0153     case CVMX_BOARD_TYPE_NIC2E:
0154         if (ipd_port >= 0 && ipd_port <= 1)
0155             return ipd_port + 1;
0156         else
0157             return -1;
0158     case CVMX_BOARD_TYPE_BBGW_REF:
0159         /*
0160          * No PHYs are connected to Octeon, everything is
0161          * through switch.
0162          */
0163         return -1;
0164
0165     case CVMX_BOARD_TYPE_CUST_WSX16:
0166         if (ipd_port >= 0 && ipd_port <= 3)
0167             return ipd_port;
0168         else if (ipd_port >= 16 && ipd_port <= 19)
0169             return ipd_port - 16 + 4;
0170         else
0171             return -1;
0172     case CVMX_BOARD_TYPE_UBNT_E100:
0173         if (ipd_port >= 0 && ipd_port <= 2)
0174             return 7 - ipd_port;
0175         else
0176             return -1;
0177     case CVMX_BOARD_TYPE_KONTRON_S1901:
0178         if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
0179             return 1;
0180         else
0181             return -1;
0182
0183     }
0184
0185     /* Some unknown board. Somebody forgot to update this function... */
0186     cvmx_dprintf
0187         ("cvmx_helper_board_get_mii_address: Unknown board type %d\n",
0188          cvmx_sysinfo_get()->board_type);
0189     return -1;
0190 }
0191
0192 /*
0193  * This function is the board specific method of determining an
0194  * ethernet ports link speed. Most Octeon boards have Marvell PHYs
0195  * and are handled by the fall through case. This function must be
0196  * updated for boards that don't have the normal Marvell PHYs.
0197  *
0198  * This function must be modified for every new Octeon board.
0199  * Internally it uses switch statements based on the cvmx_sysinfo
0200  * data to determine board types and revisions. It relies on the
0201  * fact that every Octeon board receives a unique board type
0202  * enumeration from the bootloader.
0203  *
0204  * @ipd_port: IPD input port associated with the port we want to get link
0205  *         status for.
0206  *
0207  * Returns The ports link status. If the link isn't fully resolved, this must
0208  *     return zero.
0209  */
0210 union cvmx_helper_link_info __cvmx_helper_board_link_get(int ipd_port)
0211 {
0212     union cvmx_helper_link_info result;
0213
0214     WARN(!octeon_is_simulation(),
0215          "Using deprecated link status - please update your DT");
0216
0217     /* Unless we fix it later, all links are defaulted to down */
0218     result.u64 = 0;
0219
0220     if (octeon_is_simulation()) {
0221         /* The simulator gives you a simulated 1Gbps full duplex link */
0222         result.s.link_up = 1;
0223         result.s.full_duplex = 1;
0224         result.s.speed = 1000;
0225         return result;
0226     }
0227
0228     if (OCTEON_IS_MODEL(OCTEON_CN3XXX)
0229            || OCTEON_IS_MODEL(OCTEON_CN58XX)
0230            || OCTEON_IS_MODEL(OCTEON_CN50XX)) {
0231         /*
0232          * We don't have a PHY address, so attempt to use
0233          * in-band status. It is really important that boards
0234          * not supporting in-band status never get
0235          * here. Reading broken in-band status tends to do bad
0236          * things
0237          */
0238         union cvmx_gmxx_rxx_rx_inbnd inband_status;
0239         int interface = cvmx_helper_get_interface_num(ipd_port);
0240         int index = cvmx_helper_get_interface_index_num(ipd_port);
0241         inband_status.u64 =
0242             cvmx_read_csr(CVMX_GMXX_RXX_RX_INBND(index, interface));
0243
0244         result.s.link_up = inband_status.s.status;
0245         result.s.full_duplex = inband_status.s.duplex;
0246         switch (inband_status.s.speed) {
0247         case 0: /* 10 Mbps */
0248             result.s.speed = 10;
0249             break;
0250         case 1: /* 100 Mbps */
0251             result.s.speed = 100;
0252             break;
0253         case 2: /* 1 Gbps */
0254             result.s.speed = 1000;
0255             break;
0256         case 3: /* Illegal */
0257             result.u64 = 0;
0258             break;
0259         }
0260     } else {
0261         /*
0262          * We don't have a PHY address and we don't have
0263          * in-band status. There is no way to determine the
0264          * link speed. Return down assuming this port isn't
0265          * wired
0266          */
0267         result.u64 = 0;
0268     }
0269
0270     /* If link is down, return all fields as zero. */
0271     if (!result.s.link_up)
0272         result.u64 = 0;
0273
0274     return result;
0275 }
0276
0277 /*
0278  * This function is called by cvmx_helper_interface_probe() after it
0279  * determines the number of ports Octeon can support on a specific
0280  * interface. This function is the per board location to override
0281  * this value. It is called with the number of ports Octeon might
0282  * support and should return the number of actual ports on the
0283  * board.
0284  *
0285  * This function must be modified for every new Octeon board.
0286  * Internally it uses switch statements based on the cvmx_sysinfo
0287  * data to determine board types and revisions. It relies on the
0288  * fact that every Octeon board receives a unique board type
0289  * enumeration from the bootloader.
0290  *
0291  * @interface: Interface to probe
0292  * @supported_ports:
0293  *          Number of ports Octeon supports.
0294  *
0295  * Returns Number of ports the actual board supports. Many times this will
0296  *     simple be "support_ports".
0297  */
0298 int __cvmx_helper_board_interface_probe(int interface, int supported_ports)
0299 {
0300     switch (cvmx_sysinfo_get()->board_type) {
0301     case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
0302         if (interface == 0)
0303             return 2;
0304         break;
0305     case CVMX_BOARD_TYPE_BBGW_REF:
0306         if (interface == 0)
0307             return 2;
0308         break;
0309     case CVMX_BOARD_TYPE_NIC_XLE_4G:
0310         if (interface == 0)
0311             return 0;
0312         break;
0313         /* The 2nd interface on the EBH5600 is connected to the Marvel switch,
0314            which we don't support. Disable ports connected to it */
0315     case CVMX_BOARD_TYPE_EBH5600:
0316         if (interface == 1)
0317             return 0;
0318         break;
0319     }
0320     return supported_ports;
0321 }
0322
0323 /*
0324  * Get the clock type used for the USB block based on board type.
0325  * Used by the USB code for auto configuration of clock type.
0326  *
0327  * Return USB clock type enumeration
0328  */
0329 enum cvmx_helper_board_usb_clock_types __cvmx_helper_board_usb_get_clock_type(void)
0330 {
0331     switch (cvmx_sysinfo_get()->board_type) {
0332     case CVMX_BOARD_TYPE_BBGW_REF:
0333     case CVMX_BOARD_TYPE_LANAI2_A:
0334     case CVMX_BOARD_TYPE_LANAI2_U:
0335     case CVMX_BOARD_TYPE_LANAI2_G:
0336     case CVMX_BOARD_TYPE_NIC10E_66:
0337     case CVMX_BOARD_TYPE_UBNT_E100:
0338         return USB_CLOCK_TYPE_CRYSTAL_12;
0339     case CVMX_BOARD_TYPE_NIC10E:
0340         return USB_CLOCK_TYPE_REF_12;
0341     default:
0342         break;
0343     }
0344     /* Most boards except NIC10e use a 12MHz crystal */
0345     if (OCTEON_IS_OCTEON2())
0346         return USB_CLOCK_TYPE_CRYSTAL_12;
0347     return USB_CLOCK_TYPE_REF_48;
0348 }