0001 // SPDX-License-Identifier: GPL-2.0
0002 /dts-v1/;
0003
0004 /memreserve/ 0x00000000 0x00001000; // reserved
0005 /memreserve/ 0x00001000 0x000ef000; // ROM data
0006 /memreserve/ 0x000f0000 0x004cc000; // reserved
0007
0008 #include <dt-bindings/interrupt-controller/mips-gic.h>
0009
0010 / {
0011 #address-cells = <1>;
0012 #size-cells = <1>;
0013 compatible = "mti,sead-3";
0014 model = "MIPS SEAD-3";
0015
0016 chosen {
0017 stdout-path = "serial1:115200";
0018 };
0019
0020 aliases {
0021 serial0 = &uart0;
0022 serial1 = &uart1;
0023 };
0024
0025 cpus {
0026 cpu@0 {
0027 compatible = "mti,mips14KEc", "mti,mips14Kc";
0028 };
0029 };
0030
0031 memory {
0032 device_type = "memory";
0033 reg = <0x0 0x08000000>;
0034 };
0035
0036 cpu_intc: interrupt-controller {
0037 compatible = "mti,cpu-interrupt-controller";
0038
0039 interrupt-controller;
0040 #interrupt-cells = <1>;
0041 };
0042
0043 gic: interrupt-controller@1b1c0000 {
0044 compatible = "mti,gic";
0045 reg = <0x1b1c0000 0x20000>;
0046
0047 interrupt-controller;
0048 #interrupt-cells = <3>;
0049
0050 /*
0051 * Declare the interrupt-parent even though the mti,gic
0052 * binding doesn't require it, such that the kernel can
0053 * figure out that cpu_intc is the root interrupt
0054 * controller & should be probed first.
0055 */
0056 interrupt-parent = <&cpu_intc>;
0057 };
0058
0059 usb@1b200000 {
0060 compatible = "generic-ehci";
0061 reg = <0x1b200000 0x1000>;
0062
0063 interrupt-parent = <&gic>;
0064 interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>; /* GIC 0 or CPU 6 */
0065
0066 has-transaction-translator;
0067 };
0068
0069 flash@1c000000 {
0070 compatible = "intel,28f128j3", "cfi-flash";
0071 reg = <0x1c000000 0x2000000>;
0072 #address-cells = <1>;
0073 #size-cells = <1>;
0074 bank-width = <4>;
0075
0076 partitions {
0077 compatible = "fixed-partitions";
0078 #address-cells = <1>;
0079 #size-cells = <1>;
0080
0081 user-fs@0 {
0082 label = "User FS";
0083 reg = <0x0 0x1fc0000>;
0084 };
0085
0086 board-config@3e0000 {
0087 label = "Board Config";
0088 reg = <0x1fc0000 0x40000>;
0089 };
0090 };
0091 };
0092
0093 fpga_regs: system-controller@1f000000 {
0094 compatible = "mti,sead3-fpga", "syscon", "simple-mfd";
0095 reg = <0x1f000000 0x200>;
0096
0097 reboot {
0098 compatible = "syscon-reboot";
0099 regmap = <&fpga_regs>;
0100 offset = <0x50>;
0101 mask = <0x4d>;
0102 };
0103
0104 poweroff {
0105 compatible = "restart-poweroff";
0106 };
0107 };
0108
0109 system-controller@1f000200 {
0110 compatible = "mti,sead3-cpld", "syscon", "simple-mfd";
0111 reg = <0x1f000200 0x300>;
0112
0113 led@10.0 {
0114 compatible = "register-bit-led";
0115 offset = <0x10>;
0116 mask = <0x1>;
0117 label = "pled0";
0118 };
0119 led@10.1 {
0120 compatible = "register-bit-led";
0121 offset = <0x10>;
0122 mask = <0x2>;
0123 label = "pled1";
0124 };
0125 led@10.2 {
0126 compatible = "register-bit-led";
0127 offset = <0x10>;
0128 mask = <0x4>;
0129 label = "pled2";
0130 };
0131 led@10.3 {
0132 compatible = "register-bit-led";
0133 offset = <0x10>;
0134 mask = <0x8>;
0135 label = "pled3";
0136 };
0137 led@10.4 {
0138 compatible = "register-bit-led";
0139 offset = <0x10>;
0140 mask = <0x10>;
0141 label = "pled4";
0142 };
0143 led@10.5 {
0144 compatible = "register-bit-led";
0145 offset = <0x10>;
0146 mask = <0x20>;
0147 label = "pled5";
0148 };
0149 led@10.6 {
0150 compatible = "register-bit-led";
0151 offset = <0x10>;
0152 mask = <0x40>;
0153 label = "pled6";
0154 };
0155 led@10.7 {
0156 compatible = "register-bit-led";
0157 offset = <0x10>;
0158 mask = <0x80>;
0159 label = "pled7";
0160 };
0161
0162 led@18.0 {
0163 compatible = "register-bit-led";
0164 offset = <0x18>;
0165 mask = <0x1>;
0166 label = "fled0";
0167 };
0168 led@18.1 {
0169 compatible = "register-bit-led";
0170 offset = <0x18>;
0171 mask = <0x2>;
0172 label = "fled1";
0173 };
0174 led@18.2 {
0175 compatible = "register-bit-led";
0176 offset = <0x18>;
0177 mask = <0x4>;
0178 label = "fled2";
0179 };
0180 led@18.3 {
0181 compatible = "register-bit-led";
0182 offset = <0x18>;
0183 mask = <0x8>;
0184 label = "fled3";
0185 };
0186 led@18.4 {
0187 compatible = "register-bit-led";
0188 offset = <0x18>;
0189 mask = <0x10>;
0190 label = "fled4";
0191 };
0192 led@18.5 {
0193 compatible = "register-bit-led";
0194 offset = <0x18>;
0195 mask = <0x20>;
0196 label = "fled5";
0197 };
0198 led@18.6 {
0199 compatible = "register-bit-led";
0200 offset = <0x18>;
0201 mask = <0x40>;
0202 label = "fled6";
0203 };
0204 led@18.7 {
0205 compatible = "register-bit-led";
0206 offset = <0x18>;
0207 mask = <0x80>;
0208 label = "fled7";
0209 };
0210
0211 lcd@200 {
0212 compatible = "mti,sead3-lcd";
0213 offset = <0x200>;
0214 };
0215 };
0216
0217 /* UART connected to FTDI & miniUSB socket */
0218 uart0: uart@1f000900 {
0219 compatible = "ns16550a";
0220 reg = <0x1f000900 0x20>;
0221 reg-io-width = <4>;
0222 reg-shift = <2>;
0223
0224 clock-frequency = <14745600>;
0225
0226 interrupt-parent = <&gic>;
0227 interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>; /* GIC 3 or CPU 4 */
0228
0229 no-loopback-test;
0230 };
0231
0232 /* UART connected to RS232 socket */
0233 uart1: uart@1f000800 {
0234 compatible = "ns16550a";
0235 reg = <0x1f000800 0x20>;
0236 reg-io-width = <4>;
0237 reg-shift = <2>;
0238
0239 clock-frequency = <14745600>;
0240
0241 interrupt-parent = <&gic>;
0242 interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>; /* GIC 2 or CPU 4 */
0243
0244 no-loopback-test;
0245 };
0246
0247 ethernet@1f010000 {
0248 compatible = "smsc,lan9115";
0249 reg = <0x1f010000 0x10000>;
0250 reg-io-width = <4>;
0251
0252 interrupt-parent = <&gic>;
0253 interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>; /* GIC 0 or CPU 6 */
0254
0255 phy-mode = "mii";
0256 smsc,irq-push-pull;
0257 smsc,save-mac-address;
0258 };
0259 };
