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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003  * Copyright (c) 2018 Microsemi Corporation
0004  */
0005 
0006 /dts-v1/;
0007 #include "jaguar2_common.dtsi"
0008 
0009 / {
0010         model = "Jaguar2 Cu48 PCB111 Reference Board";
0011         compatible = "mscc,jr2-pcb111", "mscc,jr2";
0012 
0013         aliases {
0014                 i2c0    = &i2c0;
0015                 i2c149  = &i2c149;
0016                 i2c150  = &i2c150;
0017                 i2c151  = &i2c151;
0018                 i2c152  = &i2c152;
0019                 i2c203  = &i2c203;
0020         };
0021 
0022         i2c0_imux: i2c0-imux {
0023                 compatible = "i2c-mux-pinctrl";
0024                 #address-cells = <1>;
0025                 #size-cells = <0>;
0026                 i2c-parent = <&i2c0>;
0027                 pinctrl-names =
0028                         "i2c149", "i2c150", "i2c151", "i2c152", "i2c203", "idle";
0029                 pinctrl-0 = <&i2cmux_0>;
0030                 pinctrl-1 = <&i2cmux_1>;
0031                 pinctrl-2 = <&i2cmux_2>;
0032                 pinctrl-3 = <&i2cmux_3>;
0033                 pinctrl-4 = <&i2cmux_pins_i>; // Added by convention for PoE
0034                 pinctrl-5 = <&i2cmux_pins_i>;
0035                 i2c149: i2c@0 {
0036                         reg = <0x0>;
0037                         #address-cells = <1>;
0038                         #size-cells = <0>;
0039                 };
0040                 i2c150: i2c@1 {
0041                         reg = <0x1>;
0042                         #address-cells = <1>;
0043                         #size-cells = <0>;
0044                 };
0045                 i2c151: i2c@2 {
0046                         reg = <0x2>;
0047                         #address-cells = <1>;
0048                         #size-cells = <0>;
0049                 };
0050                 i2c152: i2c@3 {
0051                         reg = <0x3>;
0052                         #address-cells = <1>;
0053                         #size-cells = <0>;
0054                 };
0055                 i2c203: i2c@4 {
0056                         reg = <0x4>;
0057                         #address-cells = <1>;
0058                         #size-cells = <0>;
0059                 };
0060         };
0061 };
0062 
0063 &gpio {
0064         synce_builtin_pins: synce-builtin-pins {
0065                 // GPIO 49 == SI_nCS13
0066                 pins = "GPIO_49";
0067                 function = "si";
0068         };
0069         cpld_pins: cpld-pins {
0070                 // GPIO 50 == SI_nCS14
0071                 pins = "GPIO_50";
0072                 function = "si";
0073         };
0074         cpld_fifo_pins: synce-builtin-pins {
0075                 // GPIO 51 == SI_nCS15
0076                 pins = "GPIO_51";
0077                 function = "si";
0078         };
0079 };
0080 
0081 &gpio {
0082         i2cmux_pins_i: i2cmux-pins {
0083                 pins = "GPIO_17", "GPIO_18";
0084                 function = "twi_scl_m";
0085                 output-low;
0086         };
0087         i2cmux_0: i2cmux-0-pins {
0088                 pins = "GPIO_17";
0089                 function = "twi_scl_m";
0090                 output-high;
0091         };
0092         i2cmux_1: i2cmux-1-pins {
0093                 pins = "GPIO_18";
0094                 function = "twi_scl_m";
0095                 output-high;
0096         };
0097         i2cmux_2: i2cmux-2-pins {
0098                 pins = "GPIO_20";
0099                 function = "twi_scl_m";
0100                 output-high;
0101         };
0102         i2cmux_3: i2cmux-3-pins {
0103                 pins = "GPIO_21";
0104                 function = "twi_scl_m";
0105                 output-high;
0106         };
0107 };