0001 // SPDX-License-Identifier: GPL-2.0
0002
0003 #include <dt-bindings/interrupt-controller/irq.h>
0004
0005 / {
0006 #address-cells = <2>;
0007 #size-cells = <2>;
0008
0009 cpuintc: interrupt-controller {
0010 #address-cells = <0>;
0011 #interrupt-cells = <1>;
0012 interrupt-controller;
0013 compatible = "mti,cpu-interrupt-controller";
0014 };
0015
0016 package0: bus@1fe00000 {
0017 compatible = "simple-bus";
0018 #address-cells = <2>;
0019 #size-cells = <1>;
0020 ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
0021 0 0x3ff00000 0 0x3ff00000 0x100000
0022 /* 3A HT Config Space */
0023 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000
0024 /* 3B HT Config Space */
0025 0x1efd 0xfb000000 0x1efd 0xfb000000 0x10000000>;
0026
0027 liointc: interrupt-controller@3ff01400 {
0028 compatible = "loongson,liointc-1.0";
0029 reg = <0 0x3ff01400 0x64>;
0030
0031 interrupt-controller;
0032 #interrupt-cells = <2>;
0033
0034 interrupt-parent = <&cpuintc>;
0035 interrupts = <2>, <3>;
0036 interrupt-names = "int0", "int1";
0037
0038 loongson,parent_int_map = <0xf0ffffff>, /* int0 */
0039 <0x0f000000>, /* int1 */
0040 <0x00000000>, /* int2 */
0041 <0x00000000>; /* int3 */
0042
0043 };
0044
0045 cpu_uart0: serial@1fe001e0 {
0046 compatible = "ns16550a";
0047 reg = <0 0x1fe001e0 0x8>;
0048 clock-frequency = <33000000>;
0049 interrupt-parent = <&liointc>;
0050 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
0051 no-loopback-test;
0052 };
0053
0054 cpu_uart1: serial@1fe001e8 {
0055 status = "disabled";
0056 compatible = "ns16550a";
0057 reg = <0 0x1fe001e8 0x8>;
0058 clock-frequency = <33000000>;
0059 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
0060 interrupt-parent = <&liointc>;
0061 no-loopback-test;
0062 };
0063 };
0064 };
