0001 // SPDX-License-Identifier: GPL-2.0
0002 #include <dt-bindings/clock/ingenic,tcu.h>
0003 #include <dt-bindings/clock/ingenic,x1000-cgu.h>
0004 #include <dt-bindings/dma/x1000-dma.h>
0005
0006 / {
0007 #address-cells = <1>;
0008 #size-cells = <1>;
0009 compatible = "ingenic,x1000", "ingenic,x1000e";
0010
0011 cpus {
0012 #address-cells = <1>;
0013 #size-cells = <0>;
0014
0015 cpu0: cpu@0 {
0016 device_type = "cpu";
0017 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
0018 reg = <0>;
0019
0020 clocks = <&cgu X1000_CLK_CPU>;
0021 clock-names = "cpu";
0022 };
0023 };
0024
0025 cpuintc: interrupt-controller {
0026 #address-cells = <0>;
0027 #interrupt-cells = <1>;
0028 interrupt-controller;
0029 compatible = "mti,cpu-interrupt-controller";
0030 };
0031
0032 intc: interrupt-controller@10001000 {
0033 compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc";
0034 reg = <0x10001000 0x50>;
0035
0036 interrupt-controller;
0037 #interrupt-cells = <1>;
0038
0039 interrupt-parent = <&cpuintc>;
0040 interrupts = <2>;
0041 };
0042
0043 exclk: ext {
0044 compatible = "fixed-clock";
0045 #clock-cells = <0>;
0046 };
0047
0048 rtclk: rtc {
0049 compatible = "fixed-clock";
0050 #clock-cells = <0>;
0051 clock-frequency = <32768>;
0052 };
0053
0054 cgu: x1000-cgu@10000000 {
0055 compatible = "ingenic,x1000-cgu", "simple-mfd";
0056 reg = <0x10000000 0x100>;
0057 #address-cells = <1>;
0058 #size-cells = <1>;
0059 ranges = <0x0 0x10000000 0x100>;
0060
0061 #clock-cells = <1>;
0062
0063 clocks = <&exclk>, <&rtclk>;
0064 clock-names = "ext", "rtc";
0065
0066 otg_phy: usb-phy@3c {
0067 compatible = "ingenic,x1000-phy";
0068 reg = <0x3c 0x10>;
0069
0070 clocks = <&cgu X1000_CLK_OTGPHY>;
0071
0072 #phy-cells = <0>;
0073
0074 status = "disabled";
0075 };
0076
0077 rng: rng@d8 {
0078 compatible = "ingenic,x1000-rng";
0079 reg = <0xd8 0x8>;
0080
0081 status = "disabled";
0082 };
0083
0084 mac_phy_ctrl: mac-phy-ctrl@e8 {
0085 compatible = "syscon";
0086 reg = <0xe8 0x4>;
0087 };
0088 };
0089
0090 ost: timer@12000000 {
0091 compatible = "ingenic,x1000-ost";
0092 reg = <0x12000000 0x3c>;
0093
0094 #clock-cells = <1>;
0095
0096 clocks = <&cgu X1000_CLK_OST>;
0097 clock-names = "ost";
0098
0099 interrupt-parent = <&cpuintc>;
0100 interrupts = <3>;
0101 };
0102
0103 tcu: timer@10002000 {
0104 compatible = "ingenic,x1000-tcu", "simple-mfd";
0105 reg = <0x10002000 0x1000>;
0106 #address-cells = <1>;
0107 #size-cells = <1>;
0108 ranges = <0x0 0x10002000 0x1000>;
0109
0110 #clock-cells = <1>;
0111
0112 clocks = <&cgu X1000_CLK_RTCLK>,
0113 <&cgu X1000_CLK_EXCLK>,
0114 <&cgu X1000_CLK_PCLK>,
0115 <&cgu X1000_CLK_TCU>;
0116 clock-names = "rtc", "ext", "pclk", "tcu";
0117
0118 interrupt-controller;
0119 #interrupt-cells = <1>;
0120
0121 interrupt-parent = <&intc>;
0122 interrupts = <27 26 25>;
0123
0124 wdt: watchdog@0 {
0125 compatible = "ingenic,x1000-watchdog", "ingenic,jz4780-watchdog";
0126 reg = <0x0 0x10>;
0127
0128 clocks = <&tcu TCU_CLK_WDT>;
0129 clock-names = "wdt";
0130 };
0131
0132 pwm: pwm@40 {
0133 compatible = "ingenic,x1000-pwm";
0134 reg = <0x40 0x50>;
0135
0136 #pwm-cells = <3>;
0137
0138 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
0139 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
0140 <&tcu TCU_CLK_TIMER4>;
0141 clock-names = "timer0", "timer1", "timer2", "timer3", "timer4";
0142 };
0143 };
0144
0145 rtc: rtc@10003000 {
0146 compatible = "ingenic,x1000-rtc", "ingenic,jz4780-rtc";
0147 reg = <0x10003000 0x4c>;
0148
0149 interrupt-parent = <&intc>;
0150 interrupts = <32>;
0151
0152 clocks = <&cgu X1000_CLK_RTCLK>;
0153 clock-names = "rtc";
0154 };
0155
0156 pinctrl: pin-controller@10010000 {
0157 compatible = "ingenic,x1000-pinctrl";
0158 reg = <0x10010000 0x800>;
0159 #address-cells = <1>;
0160 #size-cells = <0>;
0161
0162 gpa: gpio@0 {
0163 compatible = "ingenic,x1000-gpio";
0164 reg = <0>;
0165
0166 gpio-controller;
0167 gpio-ranges = <&pinctrl 0 0 32>;
0168 #gpio-cells = <2>;
0169
0170 interrupt-controller;
0171 #interrupt-cells = <2>;
0172
0173 interrupt-parent = <&intc>;
0174 interrupts = <17>;
0175 };
0176
0177 gpb: gpio@1 {
0178 compatible = "ingenic,x1000-gpio";
0179 reg = <1>;
0180
0181 gpio-controller;
0182 gpio-ranges = <&pinctrl 0 32 32>;
0183 #gpio-cells = <2>;
0184
0185 interrupt-controller;
0186 #interrupt-cells = <2>;
0187
0188 interrupt-parent = <&intc>;
0189 interrupts = <16>;
0190 };
0191
0192 gpc: gpio@2 {
0193 compatible = "ingenic,x1000-gpio";
0194 reg = <2>;
0195
0196 gpio-controller;
0197 gpio-ranges = <&pinctrl 0 64 32>;
0198 #gpio-cells = <2>;
0199
0200 interrupt-controller;
0201 #interrupt-cells = <2>;
0202
0203 interrupt-parent = <&intc>;
0204 interrupts = <15>;
0205 };
0206
0207 gpd: gpio@3 {
0208 compatible = "ingenic,x1000-gpio";
0209 reg = <3>;
0210
0211 gpio-controller;
0212 gpio-ranges = <&pinctrl 0 96 32>;
0213 #gpio-cells = <2>;
0214
0215 interrupt-controller;
0216 #interrupt-cells = <2>;
0217
0218 interrupt-parent = <&intc>;
0219 interrupts = <14>;
0220 };
0221 };
0222
0223 uart0: serial@10030000 {
0224 compatible = "ingenic,x1000-uart";
0225 reg = <0x10030000 0x100>;
0226
0227 interrupt-parent = <&intc>;
0228 interrupts = <51>;
0229
0230 clocks = <&exclk>, <&cgu X1000_CLK_UART0>;
0231 clock-names = "baud", "module";
0232
0233 status = "disabled";
0234 };
0235
0236 uart1: serial@10031000 {
0237 compatible = "ingenic,x1000-uart";
0238 reg = <0x10031000 0x100>;
0239
0240 interrupt-parent = <&intc>;
0241 interrupts = <50>;
0242
0243 clocks = <&exclk>, <&cgu X1000_CLK_UART1>;
0244 clock-names = "baud", "module";
0245
0246 status = "disabled";
0247 };
0248
0249 uart2: serial@10032000 {
0250 compatible = "ingenic,x1000-uart";
0251 reg = <0x10032000 0x100>;
0252
0253 interrupt-parent = <&intc>;
0254 interrupts = <49>;
0255
0256 clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
0257 clock-names = "baud", "module";
0258
0259 status = "disabled";
0260 };
0261
0262 ssi: spi@10043000 {
0263 compatible = "ingenic,x1000-spi";
0264 reg = <0x10043000 0x20>;
0265 #address-cells = <1>;
0266 #size-cells = <0>;
0267
0268 interrupt-parent = <&intc>;
0269 interrupts = <8>;
0270
0271 clocks = <&cgu X1000_CLK_SSI>;
0272 clock-names = "spi";
0273
0274 dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>,
0275 <&pdma X1000_DMA_SSI0_TX 0xffffffff>;
0276 dma-names = "rx", "tx";
0277
0278 status = "disabled";
0279 };
0280
0281 i2c0: i2c-controller@10050000 {
0282 compatible = "ingenic,x1000-i2c";
0283 reg = <0x10050000 0x1000>;
0284 #address-cells = <1>;
0285 #size-cells = <0>;
0286
0287 interrupt-parent = <&intc>;
0288 interrupts = <60>;
0289
0290 clocks = <&cgu X1000_CLK_I2C0>;
0291
0292 status = "disabled";
0293 };
0294
0295 i2c1: i2c-controller@10051000 {
0296 compatible = "ingenic,x1000-i2c";
0297 reg = <0x10051000 0x1000>;
0298 #address-cells = <1>;
0299 #size-cells = <0>;
0300
0301 interrupt-parent = <&intc>;
0302 interrupts = <59>;
0303
0304 clocks = <&cgu X1000_CLK_I2C1>;
0305
0306 status = "disabled";
0307 };
0308
0309 i2c2: i2c-controller@10052000 {
0310 compatible = "ingenic,x1000-i2c";
0311 reg = <0x10052000 0x1000>;
0312 #address-cells = <1>;
0313 #size-cells = <0>;
0314
0315 interrupt-parent = <&intc>;
0316 interrupts = <58>;
0317
0318 clocks = <&cgu X1000_CLK_I2C2>;
0319
0320 status = "disabled";
0321 };
0322
0323 pdma: dma-controller@13420000 {
0324 compatible = "ingenic,x1000-dma";
0325 reg = <0x13420000 0x400>, <0x13421000 0x40>;
0326
0327 #dma-cells = <2>;
0328
0329 interrupt-parent = <&intc>;
0330 interrupts = <10>;
0331
0332 clocks = <&cgu X1000_CLK_PDMA>;
0333 };
0334
0335 msc0: mmc@13450000 {
0336 compatible = "ingenic,x1000-mmc";
0337 reg = <0x13450000 0x1000>;
0338
0339 interrupt-parent = <&intc>;
0340 interrupts = <37>;
0341
0342 clocks = <&cgu X1000_CLK_MSC0>;
0343 clock-names = "mmc";
0344
0345 cap-sd-highspeed;
0346 cap-mmc-highspeed;
0347 cap-sdio-irq;
0348
0349 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
0350 <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
0351 dma-names = "rx", "tx";
0352
0353 status = "disabled";
0354 };
0355
0356 msc1: mmc@13460000 {
0357 compatible = "ingenic,x1000-mmc";
0358 reg = <0x13460000 0x1000>;
0359
0360 interrupt-parent = <&intc>;
0361 interrupts = <36>;
0362
0363 clocks = <&cgu X1000_CLK_MSC1>;
0364 clock-names = "mmc";
0365
0366 cap-sd-highspeed;
0367 cap-mmc-highspeed;
0368 cap-sdio-irq;
0369
0370 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
0371 <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
0372 dma-names = "rx", "tx";
0373
0374 status = "disabled";
0375 };
0376
0377 mac: ethernet@134b0000 {
0378 compatible = "ingenic,x1000-mac", "snps,dwmac";
0379 reg = <0x134b0000 0x2000>;
0380
0381 interrupt-parent = <&intc>;
0382 interrupts = <55>;
0383 interrupt-names = "macirq";
0384
0385 clocks = <&cgu X1000_CLK_MAC>;
0386 clock-names = "stmmaceth";
0387
0388 mode-reg = <&mac_phy_ctrl>;
0389
0390 status = "disabled";
0391
0392 mdio: mdio {
0393 compatible = "snps,dwmac-mdio";
0394 #address-cells = <1>;
0395 #size-cells = <0>;
0396
0397 status = "disabled";
0398 };
0399 };
0400
0401 otg: usb@13500000 {
0402 compatible = "ingenic,x1000-otg";
0403 reg = <0x13500000 0x40000>;
0404
0405 interrupt-parent = <&intc>;
0406 interrupts = <21>;
0407
0408 clocks = <&cgu X1000_CLK_OTG>;
0409 clock-names = "otg";
0410
0411 phys = <&otg_phy>;
0412 phy-names = "usb2-phy";
0413
0414 g-rx-fifo-size = <768>;
0415 g-np-tx-fifo-size = <256>;
0416 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
0417
0418 status = "disabled";
0419 };
0420 };
