0001 // SPDX-License-Identifier: GPL-2.0
0002 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
0003 #include <dt-bindings/clock/ingenic,tcu.h>
0004 #include <dt-bindings/dma/jz4780-dma.h>
0005
0006 / {
0007 #address-cells = <1>;
0008 #size-cells = <1>;
0009 compatible = "ingenic,jz4780";
0010
0011 cpus {
0012 #address-cells = <1>;
0013 #size-cells = <0>;
0014
0015 cpu0: cpu@0 {
0016 device_type = "cpu";
0017 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
0018 reg = <0>;
0019
0020 clocks = <&cgu JZ4780_CLK_CPU>;
0021 clock-names = "cpu";
0022 };
0023
0024 cpu1: cpu@1 {
0025 device_type = "cpu";
0026 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
0027 reg = <1>;
0028
0029 clocks = <&cgu JZ4780_CLK_CORE1>;
0030 clock-names = "cpu";
0031 };
0032 };
0033
0034 cpuintc: interrupt-controller {
0035 #address-cells = <0>;
0036 #interrupt-cells = <1>;
0037 interrupt-controller;
0038 compatible = "mti,cpu-interrupt-controller";
0039 };
0040
0041 intc: interrupt-controller@10001000 {
0042 compatible = "ingenic,jz4780-intc";
0043 reg = <0x10001000 0x50>;
0044
0045 interrupt-controller;
0046 #interrupt-cells = <1>;
0047
0048 interrupt-parent = <&cpuintc>;
0049 interrupts = <2>;
0050 };
0051
0052 ext: ext {
0053 compatible = "fixed-clock";
0054 #clock-cells = <0>;
0055 };
0056
0057 rtc: rtc {
0058 compatible = "fixed-clock";
0059 #clock-cells = <0>;
0060 clock-frequency = <32768>;
0061 };
0062
0063 cgu: jz4780-cgu@10000000 {
0064 compatible = "ingenic,jz4780-cgu", "simple-mfd";
0065 reg = <0x10000000 0x100>;
0066 #address-cells = <1>;
0067 #size-cells = <1>;
0068 ranges = <0x0 0x10000000 0x100>;
0069
0070 #clock-cells = <1>;
0071
0072 clocks = <&ext>, <&rtc>;
0073 clock-names = "ext", "rtc";
0074
0075 otg_phy: usb-phy@3c {
0076 compatible = "ingenic,jz4780-phy";
0077 reg = <0x3c 0x10>;
0078
0079 clocks = <&cgu JZ4780_CLK_OTG1>;
0080
0081 #phy-cells = <0>;
0082
0083 status = "disabled";
0084 };
0085
0086 rng: rng@d8 {
0087 compatible = "ingenic,jz4780-rng";
0088 reg = <0xd8 0x8>;
0089
0090 status = "disabled";
0091 };
0092 };
0093
0094 tcu: timer@10002000 {
0095 compatible = "ingenic,jz4780-tcu",
0096 "ingenic,jz4770-tcu",
0097 "simple-mfd";
0098 reg = <0x10002000 0x1000>;
0099 #address-cells = <1>;
0100 #size-cells = <1>;
0101 ranges = <0x0 0x10002000 0x1000>;
0102
0103 #clock-cells = <1>;
0104
0105 clocks = <&cgu JZ4780_CLK_RTCLK>,
0106 <&cgu JZ4780_CLK_EXCLK>,
0107 <&cgu JZ4780_CLK_PCLK>;
0108 clock-names = "rtc", "ext", "pclk";
0109
0110 interrupt-controller;
0111 #interrupt-cells = <1>;
0112
0113 interrupt-parent = <&intc>;
0114 interrupts = <27 26 25>;
0115
0116 watchdog: watchdog@0 {
0117 compatible = "ingenic,jz4780-watchdog";
0118 reg = <0x0 0xc>;
0119
0120 clocks = <&tcu TCU_CLK_WDT>;
0121 clock-names = "wdt";
0122 };
0123
0124 pwm: pwm@40 {
0125 compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
0126 reg = <0x40 0x80>;
0127
0128 #pwm-cells = <3>;
0129
0130 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
0131 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
0132 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
0133 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
0134 clock-names = "timer0", "timer1", "timer2", "timer3",
0135 "timer4", "timer5", "timer6", "timer7";
0136 };
0137
0138 ost: timer@e0 {
0139 compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
0140 reg = <0xe0 0x20>;
0141
0142 clocks = <&tcu TCU_CLK_OST>;
0143 clock-names = "ost";
0144
0145 interrupts = <15>;
0146 };
0147 };
0148
0149 rtc_dev: rtc@10003000 {
0150 compatible = "ingenic,jz4780-rtc";
0151 reg = <0x10003000 0x4c>;
0152
0153 interrupt-parent = <&intc>;
0154 interrupts = <32>;
0155
0156 clocks = <&cgu JZ4780_CLK_RTCLK>;
0157 clock-names = "rtc";
0158 };
0159
0160 pinctrl: pin-controller@10010000 {
0161 compatible = "ingenic,jz4780-pinctrl";
0162 reg = <0x10010000 0x600>;
0163
0164 #address-cells = <1>;
0165 #size-cells = <0>;
0166
0167 gpa: gpio@0 {
0168 compatible = "ingenic,jz4780-gpio";
0169 reg = <0>;
0170
0171 gpio-controller;
0172 gpio-ranges = <&pinctrl 0 0 32>;
0173 #gpio-cells = <2>;
0174
0175 interrupt-controller;
0176 #interrupt-cells = <2>;
0177
0178 interrupt-parent = <&intc>;
0179 interrupts = <17>;
0180 };
0181
0182 gpb: gpio@1 {
0183 compatible = "ingenic,jz4780-gpio";
0184 reg = <1>;
0185
0186 gpio-controller;
0187 gpio-ranges = <&pinctrl 0 32 32>;
0188 #gpio-cells = <2>;
0189
0190 interrupt-controller;
0191 #interrupt-cells = <2>;
0192
0193 interrupt-parent = <&intc>;
0194 interrupts = <16>;
0195 };
0196
0197 gpc: gpio@2 {
0198 compatible = "ingenic,jz4780-gpio";
0199 reg = <2>;
0200
0201 gpio-controller;
0202 gpio-ranges = <&pinctrl 0 64 32>;
0203 #gpio-cells = <2>;
0204
0205 interrupt-controller;
0206 #interrupt-cells = <2>;
0207
0208 interrupt-parent = <&intc>;
0209 interrupts = <15>;
0210 };
0211
0212 gpd: gpio@3 {
0213 compatible = "ingenic,jz4780-gpio";
0214 reg = <3>;
0215
0216 gpio-controller;
0217 gpio-ranges = <&pinctrl 0 96 32>;
0218 #gpio-cells = <2>;
0219
0220 interrupt-controller;
0221 #interrupt-cells = <2>;
0222
0223 interrupt-parent = <&intc>;
0224 interrupts = <14>;
0225 };
0226
0227 gpe: gpio@4 {
0228 compatible = "ingenic,jz4780-gpio";
0229 reg = <4>;
0230
0231 gpio-controller;
0232 gpio-ranges = <&pinctrl 0 128 32>;
0233 #gpio-cells = <2>;
0234
0235 interrupt-controller;
0236 #interrupt-cells = <2>;
0237
0238 interrupt-parent = <&intc>;
0239 interrupts = <13>;
0240 };
0241
0242 gpf: gpio@5 {
0243 compatible = "ingenic,jz4780-gpio";
0244 reg = <5>;
0245
0246 gpio-controller;
0247 gpio-ranges = <&pinctrl 0 160 32>;
0248 #gpio-cells = <2>;
0249
0250 interrupt-controller;
0251 #interrupt-cells = <2>;
0252
0253 interrupt-parent = <&intc>;
0254 interrupts = <12>;
0255 };
0256 };
0257
0258 spi0: spi@10043000 {
0259 compatible = "ingenic,jz4780-spi";
0260 reg = <0x10043000 0x1c>;
0261 #address-cells = <1>;
0262 #size-cells = <0>;
0263
0264 interrupt-parent = <&intc>;
0265 interrupts = <8>;
0266
0267 clocks = <&cgu JZ4780_CLK_SSI0>;
0268 clock-names = "spi";
0269
0270 dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>,
0271 <&dma JZ4780_DMA_SSI0_TX 0xffffffff>;
0272 dma-names = "rx", "tx";
0273
0274 status = "disabled";
0275 };
0276
0277 uart0: serial@10030000 {
0278 compatible = "ingenic,jz4780-uart";
0279 reg = <0x10030000 0x100>;
0280
0281 interrupt-parent = <&intc>;
0282 interrupts = <51>;
0283
0284 clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
0285 clock-names = "baud", "module";
0286
0287 status = "disabled";
0288 };
0289
0290 uart1: serial@10031000 {
0291 compatible = "ingenic,jz4780-uart";
0292 reg = <0x10031000 0x100>;
0293
0294 interrupt-parent = <&intc>;
0295 interrupts = <50>;
0296
0297 clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
0298 clock-names = "baud", "module";
0299
0300 status = "disabled";
0301 };
0302
0303 uart2: serial@10032000 {
0304 compatible = "ingenic,jz4780-uart";
0305 reg = <0x10032000 0x100>;
0306
0307 interrupt-parent = <&intc>;
0308 interrupts = <49>;
0309
0310 clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
0311 clock-names = "baud", "module";
0312
0313 status = "disabled";
0314 };
0315
0316 uart3: serial@10033000 {
0317 compatible = "ingenic,jz4780-uart";
0318 reg = <0x10033000 0x100>;
0319
0320 interrupt-parent = <&intc>;
0321 interrupts = <48>;
0322
0323 clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
0324 clock-names = "baud", "module";
0325
0326 status = "disabled";
0327 };
0328
0329 uart4: serial@10034000 {
0330 compatible = "ingenic,jz4780-uart";
0331 reg = <0x10034000 0x100>;
0332
0333 interrupt-parent = <&intc>;
0334 interrupts = <34>;
0335
0336 clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
0337 clock-names = "baud", "module";
0338
0339 status = "disabled";
0340 };
0341
0342 spi1: spi@10044000 {
0343 compatible = "ingenic,jz4780-spi";
0344 reg = <0x10044000 0x1c>;
0345 #address-cells = <1>;
0346 #size-sells = <0>;
0347
0348 interrupt-parent = <&intc>;
0349 interrupts = <7>;
0350
0351 clocks = <&cgu JZ4780_CLK_SSI1>;
0352 clock-names = "spi";
0353
0354 dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>,
0355 <&dma JZ4780_DMA_SSI1_TX 0xffffffff>;
0356 dma-names = "rx", "tx";
0357
0358 status = "disabled";
0359 };
0360
0361 i2c0: i2c@10050000 {
0362 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
0363 #address-cells = <1>;
0364 #size-cells = <0>;
0365
0366 reg = <0x10050000 0x1000>;
0367
0368 interrupt-parent = <&intc>;
0369 interrupts = <60>;
0370
0371 clocks = <&cgu JZ4780_CLK_SMB0>;
0372 clock-frequency = <100000>;
0373 pinctrl-names = "default";
0374 pinctrl-0 = <&pins_i2c0_data>;
0375
0376 status = "disabled";
0377 };
0378
0379 i2c1: i2c@10051000 {
0380 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
0381 #address-cells = <1>;
0382 #size-cells = <0>;
0383 reg = <0x10051000 0x1000>;
0384
0385 interrupt-parent = <&intc>;
0386 interrupts = <59>;
0387
0388 clocks = <&cgu JZ4780_CLK_SMB1>;
0389 clock-frequency = <100000>;
0390 pinctrl-names = "default";
0391 pinctrl-0 = <&pins_i2c1_data>;
0392
0393 status = "disabled";
0394 };
0395
0396 i2c2: i2c@10052000 {
0397 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
0398 #address-cells = <1>;
0399 #size-cells = <0>;
0400 reg = <0x10052000 0x1000>;
0401
0402 interrupt-parent = <&intc>;
0403 interrupts = <58>;
0404
0405 clocks = <&cgu JZ4780_CLK_SMB2>;
0406 clock-frequency = <100000>;
0407 pinctrl-names = "default";
0408 pinctrl-0 = <&pins_i2c2_data>;
0409
0410 status = "disabled";
0411 };
0412
0413 i2c3: i2c@10053000 {
0414 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
0415 #address-cells = <1>;
0416 #size-cells = <0>;
0417 reg = <0x10053000 0x1000>;
0418
0419 interrupt-parent = <&intc>;
0420 interrupts = <57>;
0421
0422 clocks = <&cgu JZ4780_CLK_SMB3>;
0423 clock-frequency = <100000>;
0424 pinctrl-names = "default";
0425 pinctrl-0 = <&pins_i2c3_data>;
0426
0427 status = "disabled";
0428 };
0429
0430 i2c4: i2c@10054000 {
0431 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
0432 #address-cells = <1>;
0433 #size-cells = <0>;
0434 reg = <0x10054000 0x1000>;
0435
0436 interrupt-parent = <&intc>;
0437 interrupts = <56>;
0438
0439 clocks = <&cgu JZ4780_CLK_SMB4>;
0440 clock-frequency = <100000>;
0441 pinctrl-names = "default";
0442 pinctrl-0 = <&pins_i2c4_data>;
0443
0444 status = "disabled";
0445 };
0446
0447 hdmi: hdmi@10180000 {
0448 compatible = "ingenic,jz4780-dw-hdmi";
0449 reg = <0x10180000 0x8000>;
0450 reg-io-width = <4>;
0451
0452 clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>;
0453 clock-names = "iahb", "isfr";
0454
0455 interrupt-parent = <&intc>;
0456 interrupts = <3>;
0457
0458 status = "disabled";
0459 };
0460
0461 lcdc0: lcdc0@13050000 {
0462 compatible = "ingenic,jz4780-lcd";
0463 reg = <0x13050000 0x1800>;
0464
0465 clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>;
0466 clock-names = "lcd", "lcd_pclk";
0467
0468 interrupt-parent = <&intc>;
0469 interrupts = <31>;
0470
0471 status = "disabled";
0472 };
0473
0474 lcdc1: lcdc1@130a0000 {
0475 compatible = "ingenic,jz4780-lcd";
0476 reg = <0x130a0000 0x1800>;
0477
0478 clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>;
0479 clock-names = "lcd", "lcd_pclk";
0480
0481 interrupt-parent = <&intc>;
0482 interrupts = <23>;
0483
0484 status = "disabled";
0485 };
0486
0487 nemc: nemc@13410000 {
0488 compatible = "ingenic,jz4780-nemc", "simple-mfd";
0489 reg = <0x13410000 0x10000>;
0490 #address-cells = <2>;
0491 #size-cells = <1>;
0492 ranges = <0 0 0x13410000 0x10000>,
0493 <1 0 0x1b000000 0x1000000>,
0494 <2 0 0x1a000000 0x1000000>,
0495 <3 0 0x19000000 0x1000000>,
0496 <4 0 0x18000000 0x1000000>,
0497 <5 0 0x17000000 0x1000000>,
0498 <6 0 0x16000000 0x1000000>;
0499
0500 clocks = <&cgu JZ4780_CLK_NEMC>;
0501
0502 status = "disabled";
0503
0504 efuse: efuse@d0 {
0505 reg = <0 0xd0 0x30>;
0506 compatible = "ingenic,jz4780-efuse";
0507
0508 clocks = <&cgu JZ4780_CLK_AHB2>;
0509
0510 #address-cells = <1>;
0511 #size-cells = <1>;
0512
0513 eth0_addr: eth-mac-addr@22 {
0514 reg = <0x22 0x6>;
0515 };
0516 };
0517 };
0518
0519 dma: dma@13420000 {
0520 compatible = "ingenic,jz4780-dma";
0521 reg = <0x13420000 0x400>, <0x13421000 0x40>;
0522 #dma-cells = <2>;
0523
0524 interrupt-parent = <&intc>;
0525 interrupts = <10>;
0526
0527 clocks = <&cgu JZ4780_CLK_PDMA>;
0528 };
0529
0530 mmc0: mmc@13450000 {
0531 compatible = "ingenic,jz4780-mmc";
0532 reg = <0x13450000 0x1000>;
0533
0534 interrupt-parent = <&intc>;
0535 interrupts = <37>;
0536
0537 clocks = <&cgu JZ4780_CLK_MSC0>;
0538 clock-names = "mmc";
0539
0540 cap-sd-highspeed;
0541 cap-mmc-highspeed;
0542 cap-sdio-irq;
0543 dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
0544 <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
0545 dma-names = "rx", "tx";
0546
0547 status = "disabled";
0548 };
0549
0550 mmc1: mmc@13460000 {
0551 compatible = "ingenic,jz4780-mmc";
0552 reg = <0x13460000 0x1000>;
0553
0554 interrupt-parent = <&intc>;
0555 interrupts = <36>;
0556
0557 clocks = <&cgu JZ4780_CLK_MSC1>;
0558 clock-names = "mmc";
0559
0560 cap-sd-highspeed;
0561 cap-mmc-highspeed;
0562 cap-sdio-irq;
0563 dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
0564 <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
0565 dma-names = "rx", "tx";
0566
0567 status = "disabled";
0568 };
0569
0570 bch: bch@134d0000 {
0571 compatible = "ingenic,jz4780-bch";
0572 reg = <0x134d0000 0x10000>;
0573
0574 clocks = <&cgu JZ4780_CLK_BCH>;
0575
0576 status = "disabled";
0577 };
0578
0579 otg: usb@13500000 {
0580 compatible = "ingenic,jz4780-otg";
0581 reg = <0x13500000 0x40000>;
0582
0583 interrupt-parent = <&intc>;
0584 interrupts = <21>;
0585
0586 clocks = <&cgu JZ4780_CLK_UHC>;
0587 clock-names = "otg";
0588
0589 phys = <&otg_phy>;
0590 phy-names = "usb2-phy";
0591
0592 g-rx-fifo-size = <768>;
0593 g-np-tx-fifo-size = <256>;
0594 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
0595
0596 status = "disabled";
0597 };
0598 };
