0001 // SPDX-License-Identifier: GPL-2.0
0002 #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
0003 #include <dt-bindings/clock/ingenic,tcu.h>
0004
0005 / {
0006 #address-cells = <1>;
0007 #size-cells = <1>;
0008 compatible = "ingenic,jz4770";
0009
0010 cpus {
0011 #address-cells = <1>;
0012 #size-cells = <0>;
0013
0014 cpu0: cpu@0 {
0015 device_type = "cpu";
0016 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
0017 reg = <0>;
0018
0019 clocks = <&cgu JZ4770_CLK_CCLK>;
0020 clock-names = "cpu";
0021 };
0022 };
0023
0024 cpuintc: interrupt-controller {
0025 #address-cells = <0>;
0026 #interrupt-cells = <1>;
0027 interrupt-controller;
0028 compatible = "mti,cpu-interrupt-controller";
0029 };
0030
0031 intc: interrupt-controller@10001000 {
0032 compatible = "ingenic,jz4770-intc";
0033 reg = <0x10001000 0x40>;
0034
0035 interrupt-controller;
0036 #interrupt-cells = <1>;
0037
0038 interrupt-parent = <&cpuintc>;
0039 interrupts = <2>;
0040 };
0041
0042 ext: ext {
0043 compatible = "fixed-clock";
0044 #clock-cells = <0>;
0045 };
0046
0047 osc32k: osc32k {
0048 compatible = "fixed-clock";
0049 #clock-cells = <0>;
0050 clock-frequency = <32768>;
0051 };
0052
0053 cgu: jz4770-cgu@10000000 {
0054 compatible = "ingenic,jz4770-cgu", "simple-mfd";
0055 reg = <0x10000000 0x100>;
0056 #address-cells = <1>;
0057 #size-cells = <1>;
0058 ranges = <0x0 0x10000000 0x100>;
0059
0060 clocks = <&ext>, <&osc32k>;
0061 clock-names = "ext", "osc32k";
0062
0063 #clock-cells = <1>;
0064
0065 otg_phy: usb-phy@3c {
0066 compatible = "ingenic,jz4770-phy";
0067 reg = <0x3c 0x10>;
0068
0069 clocks = <&cgu JZ4770_CLK_OTG_PHY>;
0070
0071 #phy-cells = <0>;
0072 };
0073 };
0074
0075 tcu: timer@10002000 {
0076 compatible = "ingenic,jz4770-tcu", "simple-mfd";
0077 reg = <0x10002000 0x1000>;
0078 #address-cells = <1>;
0079 #size-cells = <1>;
0080 ranges = <0x0 0x10002000 0x1000>;
0081
0082 #clock-cells = <1>;
0083
0084 clocks = <&cgu JZ4770_CLK_RTC>,
0085 <&cgu JZ4770_CLK_EXT>,
0086 <&cgu JZ4770_CLK_PCLK>;
0087 clock-names = "rtc", "ext", "pclk";
0088
0089 interrupt-controller;
0090 #interrupt-cells = <1>;
0091
0092 interrupt-parent = <&intc>;
0093 interrupts = <27 26 25>;
0094
0095 watchdog: watchdog@0 {
0096 compatible = "ingenic,jz4770-watchdog",
0097 "ingenic,jz4740-watchdog";
0098 reg = <0x0 0xc>;
0099
0100 clocks = <&tcu TCU_CLK_WDT>;
0101 clock-names = "wdt";
0102 };
0103
0104 pwm: pwm@40 {
0105 compatible = "ingenic,jz4770-pwm", "ingenic,jz4740-pwm";
0106 reg = <0x40 0x80>;
0107
0108 #pwm-cells = <3>;
0109
0110 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
0111 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
0112 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
0113 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
0114 clock-names = "timer0", "timer1", "timer2", "timer3",
0115 "timer4", "timer5", "timer6", "timer7";
0116 };
0117
0118 ost: timer@e0 {
0119 compatible = "ingenic,jz4770-ost";
0120 reg = <0xe0 0x20>;
0121
0122 clocks = <&tcu TCU_CLK_OST>;
0123 clock-names = "ost";
0124
0125 interrupts = <15>;
0126 };
0127 };
0128
0129 rtc: rtc@10003000 {
0130 compatible = "ingenic,jz4770-rtc", "ingenic,jz4760-rtc";
0131 reg = <0x10003000 0x40>;
0132
0133 interrupt-parent = <&intc>;
0134 interrupts = <32>;
0135 };
0136
0137 pinctrl: pin-controller@10010000 {
0138 compatible = "ingenic,jz4770-pinctrl";
0139 reg = <0x10010000 0x600>;
0140
0141 #address-cells = <1>;
0142 #size-cells = <0>;
0143
0144 gpa: gpio@0 {
0145 compatible = "ingenic,jz4770-gpio";
0146 reg = <0>;
0147
0148 gpio-controller;
0149 gpio-ranges = <&pinctrl 0 0 32>;
0150 #gpio-cells = <2>;
0151
0152 interrupt-controller;
0153 #interrupt-cells = <2>;
0154
0155 interrupt-parent = <&intc>;
0156 interrupts = <17>;
0157 };
0158
0159 gpb: gpio@1 {
0160 compatible = "ingenic,jz4770-gpio";
0161 reg = <1>;
0162
0163 gpio-controller;
0164 gpio-ranges = <&pinctrl 0 32 32>;
0165 #gpio-cells = <2>;
0166
0167 interrupt-controller;
0168 #interrupt-cells = <2>;
0169
0170 interrupt-parent = <&intc>;
0171 interrupts = <16>;
0172 };
0173
0174 gpc: gpio@2 {
0175 compatible = "ingenic,jz4770-gpio";
0176 reg = <2>;
0177
0178 gpio-controller;
0179 gpio-ranges = <&pinctrl 0 64 32>;
0180 #gpio-cells = <2>;
0181
0182 interrupt-controller;
0183 #interrupt-cells = <2>;
0184
0185 interrupt-parent = <&intc>;
0186 interrupts = <15>;
0187 };
0188
0189 gpd: gpio@3 {
0190 compatible = "ingenic,jz4770-gpio";
0191 reg = <3>;
0192
0193 gpio-controller;
0194 gpio-ranges = <&pinctrl 0 96 32>;
0195 #gpio-cells = <2>;
0196
0197 interrupt-controller;
0198 #interrupt-cells = <2>;
0199
0200 interrupt-parent = <&intc>;
0201 interrupts = <14>;
0202 };
0203
0204 gpe: gpio@4 {
0205 compatible = "ingenic,jz4770-gpio";
0206 reg = <4>;
0207
0208 gpio-controller;
0209 gpio-ranges = <&pinctrl 0 128 32>;
0210 #gpio-cells = <2>;
0211
0212 interrupt-controller;
0213 #interrupt-cells = <2>;
0214
0215 interrupt-parent = <&intc>;
0216 interrupts = <13>;
0217 };
0218
0219 gpf: gpio@5 {
0220 compatible = "ingenic,jz4770-gpio";
0221 reg = <5>;
0222
0223 gpio-controller;
0224 gpio-ranges = <&pinctrl 0 160 32>;
0225 #gpio-cells = <2>;
0226
0227 interrupt-controller;
0228 #interrupt-cells = <2>;
0229
0230 interrupt-parent = <&intc>;
0231 interrupts = <12>;
0232 };
0233 };
0234
0235 aic: audio-controller@10020000 {
0236 compatible = "ingenic,jz4770-i2s";
0237 reg = <0x10020000 0x94>;
0238
0239 #sound-dai-cells = <0>;
0240
0241 clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>,
0242 <&cgu JZ4770_CLK_EXT>, <&cgu JZ4770_CLK_PLL0>;
0243 clock-names = "aic", "i2s", "ext", "pll half";
0244
0245 interrupt-parent = <&intc>;
0246 interrupts = <34>;
0247
0248 dmas = <&dmac0 25 0xffffffff>, <&dmac0 24 0xffffffff>;
0249 dma-names = "rx", "tx";
0250 };
0251
0252 codec: audio-codec@100200a0 {
0253 compatible = "ingenic,jz4770-codec";
0254 reg = <0x100200a4 0x8>;
0255
0256 #sound-dai-cells = <0>;
0257
0258 clocks = <&cgu JZ4770_CLK_AIC>;
0259 clock-names = "aic";
0260 };
0261
0262 mmc0: mmc@10021000 {
0263 compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
0264 reg = <0x10021000 0x1000>;
0265
0266 clocks = <&cgu JZ4770_CLK_MMC0>;
0267 clock-names = "mmc";
0268
0269 interrupt-parent = <&intc>;
0270 interrupts = <37>;
0271
0272 dmas = <&dmac1 27 0xffffffff>, <&dmac1 26 0xffffffff>;
0273 dma-names = "rx", "tx";
0274
0275 cap-sd-highspeed;
0276 cap-mmc-highspeed;
0277 cap-sdio-irq;
0278
0279 status = "disabled";
0280 };
0281
0282 mmc1: mmc@10022000 {
0283 compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
0284 reg = <0x10022000 0x1000>;
0285
0286 clocks = <&cgu JZ4770_CLK_MMC1>;
0287 clock-names = "mmc";
0288
0289 interrupt-parent = <&intc>;
0290 interrupts = <36>;
0291
0292 dmas = <&dmac1 31 0xffffffff>, <&dmac1 30 0xffffffff>;
0293 dma-names = "rx", "tx";
0294
0295 cap-sd-highspeed;
0296 cap-mmc-highspeed;
0297 cap-sdio-irq;
0298
0299 status = "disabled";
0300 };
0301
0302 mmc2: mmc@10023000 {
0303 compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
0304 reg = <0x10023000 0x1000>;
0305
0306 clocks = <&cgu JZ4770_CLK_MMC2>;
0307 clock-names = "mmc";
0308
0309 interrupt-parent = <&intc>;
0310 interrupts = <35>;
0311
0312 dmas = <&dmac1 37 0xffffffff>, <&dmac1 36 0xffffffff>;
0313 dma-names = "rx", "tx";
0314
0315 cap-sd-highspeed;
0316 cap-mmc-highspeed;
0317 cap-sdio-irq;
0318
0319 status = "disabled";
0320 };
0321
0322 uart0: serial@10030000 {
0323 compatible = "ingenic,jz4770-uart";
0324 reg = <0x10030000 0x100>;
0325
0326 clocks = <&ext>, <&cgu JZ4770_CLK_UART0>;
0327 clock-names = "baud", "module";
0328
0329 interrupt-parent = <&intc>;
0330 interrupts = <5>;
0331
0332 status = "disabled";
0333 };
0334
0335 uart1: serial@10031000 {
0336 compatible = "ingenic,jz4770-uart";
0337 reg = <0x10031000 0x100>;
0338
0339 clocks = <&ext>, <&cgu JZ4770_CLK_UART1>;
0340 clock-names = "baud", "module";
0341
0342 interrupt-parent = <&intc>;
0343 interrupts = <4>;
0344
0345 status = "disabled";
0346 };
0347
0348 uart2: serial@10032000 {
0349 compatible = "ingenic,jz4770-uart";
0350 reg = <0x10032000 0x100>;
0351
0352 clocks = <&ext>, <&cgu JZ4770_CLK_UART2>;
0353 clock-names = "baud", "module";
0354
0355 interrupt-parent = <&intc>;
0356 interrupts = <3>;
0357
0358 status = "disabled";
0359 };
0360
0361 uart3: serial@10033000 {
0362 compatible = "ingenic,jz4770-uart";
0363 reg = <0x10033000 0x100>;
0364
0365 clocks = <&ext>, <&cgu JZ4770_CLK_UART3>;
0366 clock-names = "baud", "module";
0367
0368 interrupt-parent = <&intc>;
0369 interrupts = <2>;
0370
0371 status = "disabled";
0372 };
0373
0374 adc: adc@10070000 {
0375 compatible = "ingenic,jz4770-adc";
0376 reg = <0x10070000 0x30>;
0377
0378 #io-channel-cells = <1>;
0379
0380 clocks = <&cgu JZ4770_CLK_ADC>;
0381 clock-names = "adc";
0382
0383 interrupt-parent = <&intc>;
0384 interrupts = <18>;
0385 };
0386
0387 gpu: gpu@13040000 {
0388 compatible = "vivante,gc";
0389 reg = <0x13040000 0x10000>;
0390
0391 clocks = <&cgu JZ4770_CLK_GPU>,
0392 <&cgu JZ4770_CLK_GPU>,
0393 <&cgu JZ4770_CLK_GPU>;
0394 clock-names = "bus", "core", "shader";
0395
0396 interrupt-parent = <&intc>;
0397 interrupts = <6>;
0398 };
0399
0400 lcd: lcd-controller@13050000 {
0401 compatible = "ingenic,jz4770-lcd";
0402 reg = <0x13050000 0x130>; /* tbc */
0403
0404 interrupt-parent = <&intc>;
0405 interrupts = <31>;
0406
0407 clocks = <&cgu JZ4770_CLK_LPCLK_MUX>;
0408 clock-names = "lcd_pclk";
0409 };
0410
0411 dmac0: dma-controller@13420000 {
0412 compatible = "ingenic,jz4770-dma";
0413 reg = <0x13420000 0xC0>, <0x13420300 0x20>;
0414
0415 #dma-cells = <2>;
0416
0417 clocks = <&cgu JZ4770_CLK_DMA>;
0418 interrupt-parent = <&intc>;
0419 interrupts = <24>;
0420 };
0421
0422 dmac1: dma-controller@13420100 {
0423 compatible = "ingenic,jz4770-dma";
0424 reg = <0x13420100 0xC0>, <0x13420400 0x20>;
0425
0426 #dma-cells = <2>;
0427
0428 clocks = <&cgu JZ4770_CLK_DMA>;
0429 interrupt-parent = <&intc>;
0430 interrupts = <23>;
0431 };
0432
0433 uhc: usb@13430000 {
0434 compatible = "generic-ohci";
0435 reg = <0x13430000 0x1000>;
0436
0437 clocks = <&cgu JZ4770_CLK_UHC>, <&cgu JZ4770_CLK_UHC_PHY>;
0438 assigned-clocks = <&cgu JZ4770_CLK_UHC>;
0439 assigned-clock-rates = <48000000>;
0440
0441 interrupt-parent = <&intc>;
0442 interrupts = <20>;
0443
0444 status = "disabled";
0445 };
0446
0447 usb_otg: usb@13440000 {
0448 compatible = "ingenic,jz4770-musb";
0449 reg = <0x13440000 0x10000>;
0450
0451 clocks = <&cgu JZ4770_CLK_OTG>;
0452 clock-names = "udc";
0453
0454 interrupt-parent = <&intc>;
0455 interrupts = <21>;
0456 interrupt-names = "mc";
0457
0458 phys = <&otg_phy>;
0459
0460 usb-role-switch;
0461 };
0462
0463 rom: memory@1fc00000 {
0464 compatible = "mtd-rom";
0465 probe-type = "map_rom";
0466 reg = <0x1fc00000 0x2000>;
0467
0468 bank-width = <4>;
0469 device-width = <1>;
0470 };
0471 };