0001 // SPDX-License-Identifier: GPL-2.0
0002 / {
0003 #address-cells = <1>;
0004 #size-cells = <1>;
0005 compatible = "brcm,bcm7435";
0006
0007 cpus {
0008 #address-cells = <1>;
0009 #size-cells = <0>;
0010
0011 mips-hpt-frequency = <175625000>;
0012
0013 cpu@0 {
0014 compatible = "brcm,bmips5200";
0015 device_type = "cpu";
0016 reg = <0>;
0017 };
0018
0019 cpu@1 {
0020 compatible = "brcm,bmips5200";
0021 device_type = "cpu";
0022 reg = <1>;
0023 };
0024
0025 cpu@2 {
0026 compatible = "brcm,bmips5200";
0027 device_type = "cpu";
0028 reg = <2>;
0029 };
0030
0031 cpu@3 {
0032 compatible = "brcm,bmips5200";
0033 device_type = "cpu";
0034 reg = <3>;
0035 };
0036 };
0037
0038 aliases {
0039 uart0 = &uart0;
0040 };
0041
0042 cpu_intc: interrupt-controller {
0043 #address-cells = <0>;
0044 compatible = "mti,cpu-interrupt-controller";
0045
0046 interrupt-controller;
0047 #interrupt-cells = <1>;
0048 };
0049
0050 clocks {
0051 uart_clk: uart_clk {
0052 compatible = "fixed-clock";
0053 #clock-cells = <0>;
0054 clock-frequency = <81000000>;
0055 };
0056
0057 upg_clk: upg_clk {
0058 compatible = "fixed-clock";
0059 #clock-cells = <0>;
0060 clock-frequency = <27000000>;
0061 };
0062 };
0063
0064 rdb {
0065 #address-cells = <1>;
0066 #size-cells = <1>;
0067
0068 compatible = "simple-bus";
0069 ranges = <0 0x10000000 0x01000000>;
0070
0071 periph_intc: interrupt-controller@41b500 {
0072 compatible = "brcm,bcm7038-l1-intc";
0073 reg = <0x41b500 0x40>, <0x41b600 0x40>,
0074 <0x41b700 0x40>, <0x41b800 0x40>;
0075
0076 interrupt-controller;
0077 #interrupt-cells = <1>;
0078
0079 interrupt-parent = <&cpu_intc>;
0080 interrupts = <2>, <3>, <2>, <3>;
0081 };
0082
0083 sun_l2_intc: interrupt-controller@403000 {
0084 compatible = "brcm,l2-intc";
0085 reg = <0x403000 0x30>;
0086 interrupt-controller;
0087 #interrupt-cells = <1>;
0088 interrupt-parent = <&periph_intc>;
0089 interrupts = <52>;
0090 };
0091
0092 gisb-arb@400000 {
0093 compatible = "brcm,bcm7435-gisb-arb";
0094 reg = <0x400000 0xdc>;
0095 native-endian;
0096 interrupt-parent = <&sun_l2_intc>;
0097 interrupts = <0>, <2>;
0098 brcm,gisb-arb-master-mask = <0xf77f>;
0099 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "webcpu_0",
0100 "pcie_0", "bsp_0",
0101 "rdc_0", "raaga_0",
0102 "avd_1", "jtag_0",
0103 "svd_0", "vice_0",
0104 "vice_1", "raaga_1",
0105 "scpu";
0106 };
0107
0108 upg_irq0_intc: interrupt-controller@406780 {
0109 compatible = "brcm,bcm7120-l2-intc";
0110 reg = <0x406780 0x8>;
0111
0112 brcm,int-map-mask = <0x44>, <0x7000000>;
0113 brcm,int-fwd-mask = <0x70000>;
0114
0115 interrupt-controller;
0116 #interrupt-cells = <1>;
0117
0118 interrupt-parent = <&periph_intc>;
0119 interrupts = <60>, <58>;
0120 interrupt-names = "upg_main", "upg_bsc";
0121 };
0122
0123 upg_aon_irq0_intc: interrupt-controller@409480 {
0124 compatible = "brcm,bcm7120-l2-intc";
0125 reg = <0x409480 0x8>;
0126
0127 brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
0128 brcm,int-fwd-mask = <0>;
0129 brcm,irq-can-wake;
0130
0131 interrupt-controller;
0132 #interrupt-cells = <1>;
0133
0134 interrupt-parent = <&periph_intc>;
0135 interrupts = <61>, <59>, <64>;
0136 interrupt-names = "upg_main_aon", "upg_bsc_aon",
0137 "upg_spi";
0138 };
0139
0140 sun_top_ctrl: syscon@404000 {
0141 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
0142 reg = <0x404000 0x51c>;
0143 native-endian;
0144 };
0145
0146 reboot {
0147 compatible = "brcm,brcmstb-reboot";
0148 syscon = <&sun_top_ctrl 0x304 0x308>;
0149 };
0150
0151 uart0: serial@406b00 {
0152 compatible = "ns16550a";
0153 reg = <0x406b00 0x20>;
0154 reg-io-width = <0x4>;
0155 reg-shift = <0x2>;
0156 interrupt-parent = <&periph_intc>;
0157 interrupts = <66>;
0158 clocks = <&uart_clk>;
0159 status = "disabled";
0160 };
0161
0162 uart1: serial@406b40 {
0163 compatible = "ns16550a";
0164 reg = <0x406b40 0x20>;
0165 reg-io-width = <0x4>;
0166 reg-shift = <0x2>;
0167 interrupt-parent = <&periph_intc>;
0168 interrupts = <67>;
0169 clocks = <&uart_clk>;
0170 status = "disabled";
0171 };
0172
0173 uart2: serial@406b80 {
0174 compatible = "ns16550a";
0175 reg = <0x406b80 0x20>;
0176 reg-io-width = <0x4>;
0177 reg-shift = <0x2>;
0178 interrupt-parent = <&periph_intc>;
0179 interrupts = <68>;
0180 clocks = <&uart_clk>;
0181 status = "disabled";
0182 };
0183
0184 bsca: i2c@406300 {
0185 clock-frequency = <390000>;
0186 compatible = "brcm,brcmstb-i2c";
0187 interrupt-parent = <&upg_irq0_intc>;
0188 reg = <0x406300 0x58>;
0189 interrupts = <26>;
0190 interrupt-names = "upg_bsca";
0191 status = "disabled";
0192 };
0193
0194 bscb: i2c@409400 {
0195 clock-frequency = <390000>;
0196 compatible = "brcm,brcmstb-i2c";
0197 interrupt-parent = <&upg_aon_irq0_intc>;
0198 reg = <0x409400 0x58>;
0199 interrupts = <28>;
0200 interrupt-names = "upg_bscb";
0201 status = "disabled";
0202 };
0203
0204 bscc: i2c@406200 {
0205 clock-frequency = <390000>;
0206 compatible = "brcm,brcmstb-i2c";
0207 interrupt-parent = <&upg_irq0_intc>;
0208 reg = <0x406200 0x58>;
0209 interrupts = <24>;
0210 interrupt-names = "upg_bscc";
0211 status = "disabled";
0212 };
0213
0214 bscd: i2c@406280 {
0215 clock-frequency = <390000>;
0216 compatible = "brcm,brcmstb-i2c";
0217 interrupt-parent = <&upg_irq0_intc>;
0218 reg = <0x406280 0x58>;
0219 interrupts = <25>;
0220 interrupt-names = "upg_bscd";
0221 status = "disabled";
0222 };
0223
0224 bsce: i2c@409180 {
0225 clock-frequency = <390000>;
0226 compatible = "brcm,brcmstb-i2c";
0227 interrupt-parent = <&upg_aon_irq0_intc>;
0228 reg = <0x409180 0x58>;
0229 interrupts = <27>;
0230 interrupt-names = "upg_bsce";
0231 status = "disabled";
0232 };
0233
0234 pwma: pwm@406580 {
0235 compatible = "brcm,bcm7038-pwm";
0236 reg = <0x406580 0x28>;
0237 #pwm-cells = <2>;
0238 clocks = <&upg_clk>;
0239 status = "disabled";
0240 };
0241
0242 pwmb: pwm@406800 {
0243 compatible = "brcm,bcm7038-pwm";
0244 reg = <0x406800 0x28>;
0245 #pwm-cells = <2>;
0246 clocks = <&upg_clk>;
0247 status = "disabled";
0248 };
0249
0250 watchdog: watchdog@4067e8 {
0251 clocks = <&upg_clk>;
0252 compatible = "brcm,bcm7038-wdt";
0253 reg = <0x4067e8 0x14>;
0254 status = "disabled";
0255 };
0256
0257 aon_pm_l2_intc: interrupt-controller@408440 {
0258 compatible = "brcm,l2-intc";
0259 reg = <0x408440 0x30>;
0260 interrupt-controller;
0261 #interrupt-cells = <1>;
0262 interrupt-parent = <&periph_intc>;
0263 interrupts = <54>;
0264 brcm,irq-can-wake;
0265 };
0266
0267 aon_ctrl: syscon@408000 {
0268 compatible = "brcm,brcmstb-aon-ctrl";
0269 reg = <0x408000 0x100>, <0x408200 0x200>;
0270 reg-names = "aon-ctrl", "aon-sram";
0271 };
0272
0273 timers: timer@4067c0 {
0274 compatible = "brcm,brcmstb-timers";
0275 reg = <0x4067c0 0x40>;
0276 };
0277
0278 upg_gio: gpio@406700 {
0279 compatible = "brcm,brcmstb-gpio";
0280 reg = <0x406700 0x80>;
0281 #gpio-cells = <2>;
0282 #interrupt-cells = <2>;
0283 gpio-controller;
0284 interrupt-controller;
0285 interrupt-parent = <&upg_irq0_intc>;
0286 interrupts = <6>;
0287 brcm,gpio-bank-widths = <32 32 32 21>;
0288 };
0289
0290 upg_gio_aon: gpio@4094c0 {
0291 compatible = "brcm,brcmstb-gpio";
0292 reg = <0x4094c0 0x40>;
0293 #gpio-cells = <2>;
0294 #interrupt-cells = <2>;
0295 gpio-controller;
0296 interrupt-controller;
0297 interrupt-parent = <&upg_aon_irq0_intc>;
0298 interrupts = <6>;
0299 interrupts-extended = <&upg_aon_irq0_intc 6>,
0300 <&aon_pm_l2_intc 5>;
0301 wakeup-source;
0302 brcm,gpio-bank-widths = <18 4>;
0303 };
0304
0305 enet0: ethernet@b80000 {
0306 phy-mode = "internal";
0307 phy-handle = <&phy1>;
0308 mac-address = [ 00 10 18 36 23 1a ];
0309 compatible = "brcm,genet-v3";
0310 #address-cells = <0x1>;
0311 #size-cells = <0x1>;
0312 reg = <0xb80000 0x11c88>;
0313 interrupts = <17>, <18>;
0314 interrupt-parent = <&periph_intc>;
0315 status = "disabled";
0316
0317 mdio@e14 {
0318 compatible = "brcm,genet-mdio-v3";
0319 #address-cells = <0x1>;
0320 #size-cells = <0x0>;
0321 reg = <0xe14 0x8>;
0322
0323 phy1: ethernet-phy@1 {
0324 max-speed = <100>;
0325 reg = <0x1>;
0326 compatible = "brcm,40nm-ephy",
0327 "ethernet-phy-ieee802.3-c22";
0328 };
0329 };
0330 };
0331
0332 ehci0: usb@480300 {
0333 compatible = "brcm,bcm7435-ehci", "generic-ehci";
0334 reg = <0x480300 0x100>;
0335 native-endian;
0336 interrupt-parent = <&periph_intc>;
0337 interrupts = <70>;
0338 status = "disabled";
0339 };
0340
0341 ohci0: usb@480400 {
0342 compatible = "brcm,bcm7435-ohci", "generic-ohci";
0343 reg = <0x480400 0x100>;
0344 native-endian;
0345 no-big-frame-no;
0346 interrupt-parent = <&periph_intc>;
0347 interrupts = <72>;
0348 status = "disabled";
0349 };
0350
0351 ehci1: usb@480500 {
0352 compatible = "brcm,bcm7435-ehci", "generic-ehci";
0353 reg = <0x480500 0x100>;
0354 native-endian;
0355 interrupt-parent = <&periph_intc>;
0356 interrupts = <71>;
0357 status = "disabled";
0358 };
0359
0360 ohci1: usb@480600 {
0361 compatible = "brcm,bcm7435-ohci", "generic-ohci";
0362 reg = <0x480600 0x100>;
0363 native-endian;
0364 no-big-frame-no;
0365 interrupt-parent = <&periph_intc>;
0366 interrupts = <73>;
0367 status = "disabled";
0368 };
0369
0370 ehci2: usb@490300 {
0371 compatible = "brcm,bcm7435-ehci", "generic-ehci";
0372 reg = <0x490300 0x100>;
0373 native-endian;
0374 interrupt-parent = <&periph_intc>;
0375 interrupts = <75>;
0376 status = "disabled";
0377 };
0378
0379 ohci2: usb@490400 {
0380 compatible = "brcm,bcm7435-ohci", "generic-ohci";
0381 reg = <0x490400 0x100>;
0382 native-endian;
0383 no-big-frame-no;
0384 interrupt-parent = <&periph_intc>;
0385 interrupts = <77>;
0386 status = "disabled";
0387 };
0388
0389 ehci3: usb@490500 {
0390 compatible = "brcm,bcm7435-ehci", "generic-ehci";
0391 reg = <0x490500 0x100>;
0392 native-endian;
0393 interrupt-parent = <&periph_intc>;
0394 interrupts = <76>;
0395 status = "disabled";
0396 };
0397
0398 ohci3: usb@490600 {
0399 compatible = "brcm,bcm7435-ohci", "generic-ohci";
0400 reg = <0x490600 0x100>;
0401 native-endian;
0402 no-big-frame-no;
0403 interrupt-parent = <&periph_intc>;
0404 interrupts = <78>;
0405 status = "disabled";
0406 };
0407
0408 hif_l2_intc: interrupt-controller@41b000 {
0409 compatible = "brcm,l2-intc";
0410 reg = <0x41b000 0x30>;
0411 interrupt-controller;
0412 #interrupt-cells = <1>;
0413 interrupt-parent = <&periph_intc>;
0414 interrupts = <24>;
0415 };
0416
0417 nand: nand@41c800 {
0418 compatible = "brcm,brcmnand-v6.2", "brcm,brcmnand";
0419 #address-cells = <1>;
0420 #size-cells = <0>;
0421 reg-names = "nand", "flash-dma";
0422 reg = <0x41c800 0x600>, <0x41d000 0x100>;
0423 interrupt-parent = <&hif_l2_intc>;
0424 interrupts = <24>, <4>;
0425 status = "disabled";
0426 };
0427
0428 sata: sata@181000 {
0429 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
0430 reg-names = "ahci", "top-ctrl";
0431 reg = <0x181000 0xa9c>, <0x180020 0x1c>;
0432 interrupt-parent = <&periph_intc>;
0433 interrupts = <45>;
0434 #address-cells = <1>;
0435 #size-cells = <0>;
0436 status = "disabled";
0437
0438 sata0: sata-port@0 {
0439 reg = <0>;
0440 phys = <&sata_phy0>;
0441 };
0442
0443 sata1: sata-port@1 {
0444 reg = <1>;
0445 phys = <&sata_phy1>;
0446 };
0447 };
0448
0449 sata_phy: sata-phy@180100 {
0450 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
0451 reg = <0x180100 0x0eff>;
0452 reg-names = "phy";
0453 #address-cells = <1>;
0454 #size-cells = <0>;
0455 status = "disabled";
0456
0457 sata_phy0: sata-phy@0 {
0458 reg = <0>;
0459 #phy-cells = <0>;
0460 };
0461
0462 sata_phy1: sata-phy@1 {
0463 reg = <1>;
0464 #phy-cells = <0>;
0465 };
0466 };
0467
0468 sdhci0: sdhci@41a000 {
0469 compatible = "brcm,bcm7425-sdhci";
0470 reg = <0x41a000 0x100>;
0471 interrupt-parent = <&periph_intc>;
0472 interrupts = <47>;
0473 sd-uhs-sdr50;
0474 mmc-hs200-1_8v;
0475 status = "disabled";
0476 };
0477
0478 sdhci1: sdhci@41a200 {
0479 compatible = "brcm,bcm7425-sdhci";
0480 reg = <0x41a200 0x100>;
0481 interrupt-parent = <&periph_intc>;
0482 interrupts = <48>;
0483 sd-uhs-sdr50;
0484 mmc-hs200-1_8v;
0485 status = "disabled";
0486 };
0487
0488 spi_l2_intc: interrupt-controller@41bd00 {
0489 compatible = "brcm,l2-intc";
0490 reg = <0x41bd00 0x30>;
0491 interrupt-controller;
0492 #interrupt-cells = <1>;
0493 interrupt-parent = <&periph_intc>;
0494 interrupts = <25>;
0495 };
0496
0497 qspi: spi@41d200 {
0498 #address-cells = <0x1>;
0499 #size-cells = <0x0>;
0500 compatible = "brcm,spi-bcm-qspi",
0501 "brcm,spi-brcmstb-qspi";
0502 clocks = <&upg_clk>;
0503 reg = <0x41a920 0x4 0x41d400 0x188 0x41d200 0x50>;
0504 reg-names = "cs_reg", "hif_mspi", "bspi";
0505 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
0506 interrupt-parent = <&spi_l2_intc>;
0507 interrupt-names = "spi_lr_fullness_reached",
0508 "spi_lr_session_aborted",
0509 "spi_lr_impatient",
0510 "spi_lr_session_done",
0511 "spi_lr_overread",
0512 "mspi_done",
0513 "mspi_halted";
0514 status = "disabled";
0515 };
0516
0517 mspi: spi@409200 {
0518 #address-cells = <1>;
0519 #size-cells = <0>;
0520 compatible = "brcm,spi-bcm-qspi",
0521 "brcm,spi-brcmstb-mspi";
0522 clocks = <&upg_clk>;
0523 reg = <0x409200 0x180>;
0524 reg-names = "mspi";
0525 interrupts = <0x14>;
0526 interrupt-parent = <&upg_aon_irq0_intc>;
0527 interrupt-names = "mspi_done";
0528 status = "disabled";
0529 };
0530
0531 waketimer: waketimer@409580 {
0532 compatible = "brcm,brcmstb-waketimer";
0533 reg = <0x409580 0x14>;
0534 interrupts = <0x3>;
0535 interrupt-parent = <&aon_pm_l2_intc>;
0536 interrupt-names = "timer";
0537 clocks = <&upg_clk>;
0538 status = "disabled";
0539 };
0540 };
0541
0542 memory_controllers {
0543 compatible = "simple-bus";
0544 ranges = <0x0 0x103b0000 0x1a000>;
0545 #address-cells = <1>;
0546 #size-cells = <1>;
0547
0548 memory-controller@0 {
0549 compatible = "brcm,brcmstb-memc", "simple-bus";
0550 ranges = <0x0 0x0 0xa000>;
0551 #address-cells = <1>;
0552 #size-cells = <1>;
0553
0554 memc-arb@1000 {
0555 compatible = "brcm,brcmstb-memc-arb";
0556 reg = <0x1000 0x248>;
0557 };
0558
0559 memc-ddr@2000 {
0560 compatible = "brcm,brcmstb-memc-ddr";
0561 reg = <0x2000 0x300>;
0562 };
0563
0564 ddr-phy@6000 {
0565 compatible = "brcm,brcmstb-ddr-phy";
0566 reg = <0x6000 0xc8>;
0567 };
0568
0569 shimphy@8000 {
0570 compatible = "brcm,brcmstb-ddr-shimphy";
0571 reg = <0x8000 0x13c>;
0572 };
0573 };
0574
0575 memory-controller@1 {
0576 compatible = "brcm,brcmstb-memc", "simple-bus";
0577 ranges = <0x0 0x10000 0xa000>;
0578 #address-cells = <1>;
0579 #size-cells = <1>;
0580
0581 memc-arb@1000 {
0582 compatible = "brcm,brcmstb-memc-arb";
0583 reg = <0x1000 0x248>;
0584 };
0585
0586 memc-ddr@2000 {
0587 compatible = "brcm,brcmstb-memc-ddr";
0588 reg = <0x2000 0x300>;
0589 };
0590
0591 ddr-phy@6000 {
0592 compatible = "brcm,brcmstb-ddr-phy";
0593 reg = <0x6000 0xc8>;
0594 };
0595
0596 shimphy@8000 {
0597 compatible = "brcm,brcmstb-ddr-shimphy";
0598 reg = <0x8000 0x13c>;
0599 };
0600 };
0601 };
0602
0603 pcie_0: pcie@8b20000 {
0604 status = "disabled";
0605 compatible = "brcm,bcm7435-pcie";
0606
0607 ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0x0 0x08000000
0608 0x02000000 0x0 0xd8000000 0xd8000000 0x0 0x08000000
0609 0x02000000 0x0 0xe0000000 0xe0000000 0x0 0x08000000
0610 0x02000000 0x0 0xe8000000 0xe8000000 0x0 0x08000000>;
0611
0612 reg = <0x10410000 0x19310>;
0613 aspm-no-l0s;
0614 device_type = "pci";
0615 msi-controller;
0616 msi-parent = <&pcie_0>;
0617 #address-cells = <0x3>;
0618 #size-cells = <0x2>;
0619 bus-range = <0x0 0xff>;
0620 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0621 linux,pci-domain = <0x0>;
0622
0623 interrupt-parent = <&periph_intc>;
0624 interrupts = <39>, <39>;
0625 interrupt-names = "pcie", "msi";
0626 #interrupt-cells = <0x1>;
0627 interrupt-map = <0 0 0 1 &periph_intc 0x23
0628 0 0 0 1 &periph_intc 0x24
0629 0 0 0 1 &periph_intc 0x25
0630 0 0 0 1 &periph_intc 0x26>;
0631 };
0632 };
