0001 // SPDX-License-Identifier: GPL-2.0
0002
0003 #include "dt-bindings/clock/bcm63268-clock.h"
0004 #include "dt-bindings/reset/bcm63268-reset.h"
0005 #include "dt-bindings/soc/bcm63268-pm.h"
0006
0007 / {
0008 #address-cells = <1>;
0009 #size-cells = <1>;
0010 compatible = "brcm,bcm63268";
0011
0012 cpus {
0013 #address-cells = <1>;
0014 #size-cells = <0>;
0015
0016 mips-hpt-frequency = <200000000>;
0017
0018 cpu@0 {
0019 compatible = "brcm,bmips4350";
0020 device_type = "cpu";
0021 reg = <0>;
0022 };
0023
0024 cpu@1 {
0025 compatible = "brcm,bmips4350";
0026 device_type = "cpu";
0027 reg = <1>;
0028 };
0029 };
0030
0031 clocks {
0032 periph_osc: periph-osc {
0033 compatible = "fixed-clock";
0034 #clock-cells = <0>;
0035 clock-frequency = <50000000>;
0036 clock-output-names = "periph";
0037 };
0038
0039 hsspi_osc: hsspi-osc {
0040 compatible = "fixed-clock";
0041
0042 #clock-cells = <0>;
0043
0044 clock-frequency = <400000000>;
0045 clock-output-names = "hsspi_osc";
0046 };
0047 };
0048
0049 aliases {
0050 nflash = &nflash;
0051 serial0 = &uart0;
0052 serial1 = &uart1;
0053 spi0 = &lsspi;
0054 spi1 = &hsspi;
0055 };
0056
0057 cpu_intc: interrupt-controller {
0058 #address-cells = <0>;
0059 compatible = "mti,cpu-interrupt-controller";
0060
0061 interrupt-controller;
0062 #interrupt-cells = <1>;
0063 };
0064
0065 ubus {
0066 #address-cells = <1>;
0067 #size-cells = <1>;
0068
0069 compatible = "simple-bus";
0070 ranges;
0071
0072 periph_clk: clock-controller@10000004 {
0073 compatible = "brcm,bcm63268-clocks";
0074 reg = <0x10000004 0x4>;
0075 #clock-cells = <1>;
0076 };
0077
0078 pll_cntl: syscon@10000008 {
0079 compatible = "syscon";
0080 reg = <0x10000008 0x4>;
0081 native-endian;
0082
0083 reboot {
0084 compatible = "syscon-reboot";
0085 offset = <0x0>;
0086 mask = <0x1>;
0087 };
0088 };
0089
0090 periph_rst: reset-controller@10000010 {
0091 compatible = "brcm,bcm6345-reset";
0092 reg = <0x10000010 0x4>;
0093 #reset-cells = <1>;
0094 };
0095
0096 periph_intc: interrupt-controller@10000020 {
0097 compatible = "brcm,bcm6345-l1-intc";
0098 reg = <0x10000020 0x20>,
0099 <0x10000040 0x20>;
0100
0101 interrupt-controller;
0102 #interrupt-cells = <1>;
0103
0104 interrupt-parent = <&cpu_intc>;
0105 interrupts = <2>, <3>;
0106 };
0107
0108 wdt: watchdog@1000009c {
0109 compatible = "brcm,bcm7038-wdt";
0110 reg = <0x1000009c 0xc>;
0111
0112 clocks = <&periph_osc>;
0113 clock-names = "refclk";
0114
0115 timeout-sec = <30>;
0116 };
0117
0118 uart0: serial@10000180 {
0119 compatible = "brcm,bcm6345-uart";
0120 reg = <0x10000180 0x18>;
0121
0122 interrupt-parent = <&periph_intc>;
0123 interrupts = <5>;
0124
0125 clocks = <&periph_osc>;
0126 clock-names = "refclk";
0127
0128 status = "disabled";
0129 };
0130
0131 nflash: nand@10000200 {
0132 #address-cells = <1>;
0133 #size-cells = <0>;
0134 compatible = "brcm,nand-bcm6368",
0135 "brcm,brcmnand-v4.0",
0136 "brcm,brcmnand";
0137 reg = <0x10000200 0x180>,
0138 <0x10000600 0x200>,
0139 <0x100000b0 0x10>;
0140 reg-names = "nand",
0141 "nand-cache",
0142 "nand-int-base";
0143
0144 interrupt-parent = <&periph_intc>;
0145 interrupts = <50>;
0146
0147 clocks = <&periph_clk BCM63268_CLK_NAND>;
0148 clock-names = "nand";
0149
0150 status = "disabled";
0151 };
0152
0153 uart1: serial@100001a0 {
0154 compatible = "brcm,bcm6345-uart";
0155 reg = <0x100001a0 0x18>;
0156
0157 interrupt-parent = <&periph_intc>;
0158 interrupts = <34>;
0159
0160 clocks = <&periph_osc>;
0161 clock-names = "refclk";
0162
0163 status = "disabled";
0164 };
0165
0166 lsspi: spi@10000800 {
0167 #address-cells = <1>;
0168 #size-cells = <0>;
0169 compatible = "brcm,bcm6358-spi";
0170 reg = <0x10000800 0x70c>;
0171
0172 interrupt-parent = <&periph_intc>;
0173 interrupts = <80>;
0174
0175 clocks = <&periph_clk BCM63268_CLK_SPI>;
0176 clock-names = "spi";
0177
0178 resets = <&periph_rst BCM63268_RST_SPI>;
0179
0180 status = "disabled";
0181 };
0182
0183 hsspi: spi@10001000 {
0184 #address-cells = <1>;
0185 #size-cells = <0>;
0186 compatible = "brcm,bcm6328-hsspi";
0187 reg = <0x10001000 0x600>;
0188
0189 interrupt-parent = <&periph_intc>;
0190 interrupts = <6>;
0191
0192 clocks = <&periph_clk BCM63268_CLK_HSSPI>,
0193 <&hsspi_osc>;
0194 clock-names = "hsspi",
0195 "pll";
0196
0197 resets = <&periph_rst BCM63268_RST_SPI>;
0198
0199 status = "disabled";
0200 };
0201
0202 periph_pwr: power-controller@1000184c {
0203 compatible = "brcm,bcm6328-power-controller";
0204 reg = <0x1000184c 0x4>;
0205 #power-domain-cells = <1>;
0206 };
0207
0208 leds0: led-controller@10001900 {
0209 #address-cells = <1>;
0210 #size-cells = <0>;
0211 compatible = "brcm,bcm6328-leds";
0212 reg = <0x10001900 0x24>;
0213
0214 status = "disabled";
0215 };
0216
0217 ehci: usb@10002500 {
0218 compatible = "brcm,bcm63268-ehci", "generic-ehci";
0219 reg = <0x10002500 0x100>;
0220 big-endian;
0221
0222 interrupt-parent = <&periph_intc>;
0223 interrupts = <10>;
0224
0225 phys = <&usbh 0>;
0226 phy-names = "usb";
0227
0228 status = "disabled";
0229 };
0230
0231 ohci: usb@10002600 {
0232 compatible = "brcm,bcm63268-ohci", "generic-ohci";
0233 reg = <0x10002600 0x100>;
0234 big-endian;
0235 no-big-frame-no;
0236
0237 interrupt-parent = <&periph_intc>;
0238 interrupts = <9>;
0239
0240 phys = <&usbh 0>;
0241 phy-names = "usb";
0242
0243 status = "disabled";
0244 };
0245
0246 usbh: usb-phy@10002700 {
0247 compatible = "brcm,bcm63268-usbh-phy";
0248 reg = <0x10002700 0x38>;
0249 #phy-cells = <1>;
0250
0251 clocks = <&periph_clk BCM63268_CLK_USBH>;
0252 clock-names = "usbh";
0253
0254 power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
0255
0256 resets = <&periph_rst BCM63268_RST_USBH>;
0257 reset-names = "usbh";
0258
0259 status = "disabled";
0260 };
0261 };
0262 };
