mips/bcm63xx/setup.c

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
0007  */
0008
0009 #include <linux/init.h>
0010 #include <linux/kernel.h>
0011 #include <linux/delay.h>
0012 #include <linux/memblock.h>
0013 #include <linux/ioport.h>
0014 #include <linux/pm.h>
0015 #include <asm/bootinfo.h>
0016 #include <asm/time.h>
0017 #include <asm/reboot.h>
0018 #include <asm/cacheflush.h>
0019 #include <bcm63xx_board.h>
0020 #include <bcm63xx_cpu.h>
0021 #include <bcm63xx_regs.h>
0022 #include <bcm63xx_io.h>
0023 #include <bcm63xx_gpio.h>
0024
0025 void bcm63xx_machine_halt(void)
0026 {
0027     pr_info("System halted\n");
0028     while (1)
0029         ;
0030 }
0031
0032 static void bcm6348_a1_reboot(void)
0033 {
0034     u32 reg;
0035
0036     /* soft reset all blocks */
0037     pr_info("soft-resetting all blocks ...\n");
0038     reg = bcm_perf_readl(PERF_SOFTRESET_REG);
0039     reg &= ~SOFTRESET_6348_ALL;
0040     bcm_perf_writel(reg, PERF_SOFTRESET_REG);
0041     mdelay(10);
0042
0043     reg = bcm_perf_readl(PERF_SOFTRESET_REG);
0044     reg |= SOFTRESET_6348_ALL;
0045     bcm_perf_writel(reg, PERF_SOFTRESET_REG);
0046     mdelay(10);
0047
0048     /* Jump to the power on address. */
0049     pr_info("jumping to reset vector.\n");
0050     /* set high vectors (base at 0xbfc00000 */
0051     set_c0_status(ST0_BEV | ST0_ERL);
0052     /* run uncached in kseg0 */
0053     change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
0054     __flush_cache_all();
0055     /* remove all wired TLB entries */
0056     write_c0_wired(0);
0057     __asm__ __volatile__(
0058         "jr\t%0"
0059         :
0060         : "r" (0xbfc00000));
0061     while (1)
0062         ;
0063 }
0064
0065 void bcm63xx_machine_reboot(void)
0066 {
0067     u32 reg, perf_regs[2] = { 0, 0 };
0068     unsigned int i;
0069
0070     /* mask and clear all external irq */
0071     switch (bcm63xx_get_cpu_id()) {
0072     case BCM3368_CPU_ID:
0073         perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
0074         break;
0075     case BCM6328_CPU_ID:
0076         perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
0077         break;
0078     case BCM6338_CPU_ID:
0079         perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
0080         break;
0081     case BCM6345_CPU_ID:
0082         perf_regs[0] = PERF_EXTIRQ_CFG_REG_6345;
0083         break;
0084     case BCM6348_CPU_ID:
0085         perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348;
0086         break;
0087     case BCM6358_CPU_ID:
0088         perf_regs[0] = PERF_EXTIRQ_CFG_REG_6358;
0089         break;
0090     case BCM6362_CPU_ID:
0091         perf_regs[0] = PERF_EXTIRQ_CFG_REG_6362;
0092         break;
0093     }
0094
0095     for (i = 0; i < 2; i++) {
0096         if (!perf_regs[i])
0097             break;
0098
0099         reg = bcm_perf_readl(perf_regs[i]);
0100         if (BCMCPU_IS_6348()) {
0101             reg &= ~EXTIRQ_CFG_MASK_ALL_6348;
0102             reg |= EXTIRQ_CFG_CLEAR_ALL_6348;
0103         } else {
0104             reg &= ~EXTIRQ_CFG_MASK_ALL;
0105             reg |= EXTIRQ_CFG_CLEAR_ALL;
0106         }
0107         bcm_perf_writel(reg, perf_regs[i]);
0108     }
0109
0110     if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
0111         bcm6348_a1_reboot();
0112
0113     pr_info("triggering watchdog soft-reset...\n");
0114     if (BCMCPU_IS_6328()) {
0115         bcm_wdt_writel(1, WDT_SOFTRESET_REG);
0116     } else {
0117         reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
0118         reg |= SYS_PLL_SOFT_RESET;
0119         bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
0120     }
0121     while (1)
0122         ;
0123 }
0124
0125 static void __bcm63xx_machine_reboot(char *p)
0126 {
0127     bcm63xx_machine_reboot();
0128 }
0129
0130 /*
0131  * return system type in /proc/cpuinfo
0132  */
0133 const char *get_system_type(void)
0134 {
0135     static char buf[128];
0136     snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%02X)",
0137          board_get_name(),
0138          bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
0139     return buf;
0140 }
0141
0142 void __init plat_time_init(void)
0143 {
0144     mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
0145 }
0146
0147 void __init plat_mem_setup(void)
0148 {
0149     memblock_add(0, bcm63xx_get_memory_size());
0150
0151     _machine_halt = bcm63xx_machine_halt;
0152     _machine_restart = __bcm63xx_machine_reboot;
0153     pm_power_off = bcm63xx_machine_halt;
0154
0155     set_io_port_base(0);
0156     ioport_resource.start = 0;
0157     ioport_resource.end = ~0;
0158
0159     board_setup();
0160 }
0161
0162 int __init bcm63xx_register_devices(void)
0163 {
0164     /* register gpiochip */
0165     bcm63xx_gpio_init();
0166
0167     return board_register_devices();
0168 }
0169
0170 arch_initcall(bcm63xx_register_devices);