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OSCL-LXR

 
 

    


0001 /*
0002  *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
0003  *
0004  *  This program is free software; you can redistribute  it and/or modify it
0005  *  under  the terms of  the GNU General  Public License as published by the
0006  *  Free Software Foundation;  either version 2 of the  License, or (at your
0007  *  option) any later version.
0008  *
0009  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
0010  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
0011  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
0012  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
0013  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
0014  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
0015  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
0016  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
0017  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
0018  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0019  *
0020  *  You should have received a copy of the  GNU General Public License along
0021  *  with this program; if not, write  to the Free Software Foundation, Inc.,
0022  *  675 Mass Ave, Cambridge, MA 02139, USA.
0023  */
0024 
0025 #include <linux/init.h>
0026 #include <linux/ssb/ssb.h>
0027 #include <asm/time.h>
0028 #include <bcm47xx.h>
0029 #include <bcm47xx_board.h>
0030 
0031 void __init plat_time_init(void)
0032 {
0033     unsigned long hz = 0;
0034     u16 chip_id = 0;
0035     char buf[10];
0036     int len;
0037     enum bcm47xx_board board = bcm47xx_board_get();
0038 
0039     /*
0040      * Use deterministic values for initial counter interrupt
0041      * so that calibrate delay avoids encountering a counter wrap.
0042      */
0043     write_c0_count(0);
0044     write_c0_compare(0xffff);
0045 
0046     switch (bcm47xx_bus_type) {
0047 #ifdef CONFIG_BCM47XX_SSB
0048     case BCM47XX_BUS_TYPE_SSB:
0049         hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
0050         chip_id = bcm47xx_bus.ssb.chip_id;
0051         break;
0052 #endif
0053 #ifdef CONFIG_BCM47XX_BCMA
0054     case BCM47XX_BUS_TYPE_BCMA:
0055         hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
0056         chip_id = bcm47xx_bus.bcma.bus.chipinfo.id;
0057         break;
0058 #endif
0059     }
0060 
0061     if (chip_id == 0x5354) {
0062         len = bcm47xx_nvram_getenv("clkfreq", buf, sizeof(buf));
0063         if (len >= 0 && !strncmp(buf, "200", 4))
0064             hz = 100000000;
0065     }
0066 
0067     switch (board) {
0068     case BCM47XX_BOARD_ASUS_WL520GC:
0069     case BCM47XX_BOARD_ASUS_WL520GU:
0070         hz = 100000000;
0071         break;
0072     default:
0073         break;
0074     }
0075 
0076     if (!hz)
0077         hz = 100000000;
0078 
0079     /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
0080     mips_hpt_frequency = hz;
0081 }