mips/bcm47xx/irq.c

0001 /*
0002  *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
0003  *
0004  *  This program is free software; you can redistribute  it and/or modify it
0005  *  under  the terms of  the GNU General  Public License as published by the
0006  *  Free Software Foundation;  either version 2 of the  License, or (at your
0007  *  option) any later version.
0008  *
0009  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
0010  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
0011  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
0012  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
0013  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
0014  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
0015  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
0016  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
0017  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
0018  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0019  *
0020  *  You should have received a copy of the  GNU General Public License along
0021  *  with this program; if not, write  to the Free Software Foundation, Inc.,
0022  *  675 Mass Ave, Cambridge, MA 02139, USA.
0023  */
0024
0025 #include "bcm47xx_private.h"
0026
0027 #include <linux/types.h>
0028 #include <linux/interrupt.h>
0029 #include <linux/irq.h>
0030 #include <asm/setup.h>
0031 #include <asm/irq_cpu.h>
0032 #include <bcm47xx.h>
0033
0034 asmlinkage void plat_irq_dispatch(void)
0035 {
0036     u32 cause;
0037
0038     cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
0039
0040     clear_c0_status(cause);
0041
0042     if (cause & CAUSEF_IP7)
0043         do_IRQ(7);
0044     if (cause & CAUSEF_IP2)
0045         do_IRQ(2);
0046     if (cause & CAUSEF_IP3)
0047         do_IRQ(3);
0048     if (cause & CAUSEF_IP4)
0049         do_IRQ(4);
0050     if (cause & CAUSEF_IP5)
0051         do_IRQ(5);
0052     if (cause & CAUSEF_IP6)
0053         do_IRQ(6);
0054 }
0055
0056 #define DEFINE_HWx_IRQDISPATCH(x)                   \
0057     static void bcm47xx_hw ## x ## _irqdispatch(void)       \
0058     {                               \
0059         do_IRQ(x);                      \
0060     }
0061 DEFINE_HWx_IRQDISPATCH(2)
0062 DEFINE_HWx_IRQDISPATCH(3)
0063 DEFINE_HWx_IRQDISPATCH(4)
0064 DEFINE_HWx_IRQDISPATCH(5)
0065 DEFINE_HWx_IRQDISPATCH(6)
0066 DEFINE_HWx_IRQDISPATCH(7)
0067
0068 void __init arch_init_irq(void)
0069 {
0070     /*
0071      * This is the first arch callback after mm_init (we can use kmalloc),
0072      * so let's finish bus initialization now.
0073      */
0074     bcm47xx_bus_setup();
0075
0076 #ifdef CONFIG_BCM47XX_BCMA
0077     if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
0078         bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
0079                  BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31);
0080         /*
0081          * the kernel reads the timer irq from some register and thinks
0082          * it's #5, but we offset it by 2 and route to #7
0083          */
0084         cp0_compare_irq = 7;
0085     }
0086 #endif
0087     mips_cpu_irq_init();
0088
0089     if (cpu_has_vint) {
0090         pr_info("Setting up vectored interrupts\n");
0091         set_vi_handler(2, bcm47xx_hw2_irqdispatch);
0092         set_vi_handler(3, bcm47xx_hw3_irqdispatch);
0093         set_vi_handler(4, bcm47xx_hw4_irqdispatch);
0094         set_vi_handler(5, bcm47xx_hw5_irqdispatch);
0095         set_vi_handler(6, bcm47xx_hw6_irqdispatch);
0096         set_vi_handler(7, bcm47xx_hw7_irqdispatch);
0097     }
0098 }