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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * DBAu1300 init and platform device setup.
0004  *
0005  * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
0006  */
0007 
0008 #include <linux/clk.h>
0009 #include <linux/dma-mapping.h>
0010 #include <linux/gpio.h>
0011 #include <linux/gpio_keys.h>
0012 #include <linux/init.h>
0013 #include <linux/input.h>    /* KEY_* codes */
0014 #include <linux/i2c.h>
0015 #include <linux/io.h>
0016 #include <linux/leds.h>
0017 #include <linux/interrupt.h>
0018 #include <linux/ata_platform.h>
0019 #include <linux/mmc/host.h>
0020 #include <linux/module.h>
0021 #include <linux/mtd/mtd.h>
0022 #include <linux/mtd/platnand.h>
0023 #include <linux/platform_device.h>
0024 #include <linux/smsc911x.h>
0025 #include <linux/wm97xx.h>
0026 
0027 #include <asm/mach-au1x00/au1000.h>
0028 #include <asm/mach-au1x00/gpio-au1300.h>
0029 #include <asm/mach-au1x00/au1100_mmc.h>
0030 #include <asm/mach-au1x00/au1200fb.h>
0031 #include <asm/mach-au1x00/au1xxx_dbdma.h>
0032 #include <asm/mach-au1x00/au1xxx_psc.h>
0033 #include <asm/mach-db1x00/bcsr.h>
0034 #include <asm/mach-au1x00/prom.h>
0035 
0036 #include "platform.h"
0037 
0038 /* FPGA (external mux) interrupt sources */
0039 #define DB1300_FIRST_INT    (ALCHEMY_GPIC_INT_LAST + 1)
0040 #define DB1300_IDE_INT      (DB1300_FIRST_INT + 0)
0041 #define DB1300_ETH_INT      (DB1300_FIRST_INT + 1)
0042 #define DB1300_CF_INT       (DB1300_FIRST_INT + 2)
0043 #define DB1300_VIDEO_INT    (DB1300_FIRST_INT + 4)
0044 #define DB1300_HDMI_INT     (DB1300_FIRST_INT + 5)
0045 #define DB1300_DC_INT       (DB1300_FIRST_INT + 6)
0046 #define DB1300_FLASH_INT    (DB1300_FIRST_INT + 7)
0047 #define DB1300_CF_INSERT_INT    (DB1300_FIRST_INT + 8)
0048 #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
0049 #define DB1300_AC97_INT     (DB1300_FIRST_INT + 10)
0050 #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
0051 #define DB1300_SD1_INSERT_INT   (DB1300_FIRST_INT + 12)
0052 #define DB1300_SD1_EJECT_INT    (DB1300_FIRST_INT + 13)
0053 #define DB1300_OTG_VBUS_OC_INT  (DB1300_FIRST_INT + 14)
0054 #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
0055 #define DB1300_LAST_INT     (DB1300_FIRST_INT + 15)
0056 
0057 /* SMSC9210 CS */
0058 #define DB1300_ETH_PHYS_ADDR    0x19000000
0059 #define DB1300_ETH_PHYS_END 0x197fffff
0060 
0061 /* ATA CS */
0062 #define DB1300_IDE_PHYS_ADDR    0x18800000
0063 #define DB1300_IDE_REG_SHIFT    5
0064 #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
0065 
0066 /* NAND CS */
0067 #define DB1300_NAND_PHYS_ADDR   0x20000000
0068 #define DB1300_NAND_PHYS_END    0x20000fff
0069 
0070 
0071 static struct i2c_board_info db1300_i2c_devs[] __initdata = {
0072     { I2C_BOARD_INFO("wm8731", 0x1b), },    /* I2S audio codec */
0073     { I2C_BOARD_INFO("ne1619", 0x2d), },    /* adm1025-compat hwmon */
0074 };
0075 
0076 /* multifunction pins to assign to GPIO controller */
0077 static int db1300_gpio_pins[] __initdata = {
0078     AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
0079     AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
0080     AU1300_PIN_EXTCLK1,
0081     -1, /* terminator */
0082 };
0083 
0084 /* multifunction pins to assign to device functions */
0085 static int db1300_dev_pins[] __initdata = {
0086     /* wake-from-str pins 0-3 */
0087     AU1300_PIN_WAKE0,
0088     /* external clock sources for PSC0 */
0089     AU1300_PIN_EXTCLK0,
0090     /* 8bit MMC interface on SD0: 6-9 */
0091     AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
0092     AU1300_PIN_SD0DAT7,
0093     /* UART1 pins: 11-18 */
0094     AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
0095     AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
0096     AU1300_PIN_U1RX, AU1300_PIN_U1TX,
0097     /* UART0 pins: 19-24 */
0098     AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
0099     AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
0100     /* UART2: 25-26 */
0101     AU1300_PIN_U2RX, AU1300_PIN_U2TX,
0102     /* UART3: 27-28 */
0103     AU1300_PIN_U3RX, AU1300_PIN_U3TX,
0104     /* LCD controller PWMs, ext pixclock: 30-31 */
0105     AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
0106     /* SD1 interface: 32-37 */
0107     AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
0108     AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
0109     /* SD2 interface: 38-43 */
0110     AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
0111     AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
0112     /* PSC0/1 clocks: 44-45 */
0113     AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
0114     /* PSCs: 46-49/50-53/54-57/58-61 */
0115     AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
0116     AU1300_PIN_PSC0D1,
0117     AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
0118     AU1300_PIN_PSC1D1,
0119     AU1300_PIN_PSC2SYNC0,               AU1300_PIN_PSC2D0,
0120     AU1300_PIN_PSC2D1,
0121     AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
0122     AU1300_PIN_PSC3D1,
0123     /* PCMCIA interface: 62-70 */
0124     AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
0125     AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
0126     AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
0127     /* camera interface H/V sync inputs: 71-72 */
0128     AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
0129     /* PSC2/3 clocks: 73-74 */
0130     AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
0131     -1, /* terminator */
0132 };
0133 
0134 static void __init db1300_gpio_config(void)
0135 {
0136     int *i;
0137 
0138     i = &db1300_dev_pins[0];
0139     while (*i != -1)
0140         au1300_pinfunc_to_dev(*i++);
0141 
0142     i = &db1300_gpio_pins[0];
0143     while (*i != -1)
0144         au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
0145 
0146     au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
0147 }
0148 
0149 /**********************************************************************/
0150 
0151 static u64 au1300_all_dmamask = DMA_BIT_MASK(32);
0152 
0153 static void au1300_nand_cmd_ctrl(struct nand_chip *this, int cmd,
0154                  unsigned int ctrl)
0155 {
0156     unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W;
0157 
0158     ioaddr &= 0xffffff00;
0159 
0160     if (ctrl & NAND_CLE) {
0161         ioaddr += MEM_STNAND_CMD;
0162     } else if (ctrl & NAND_ALE) {
0163         ioaddr += MEM_STNAND_ADDR;
0164     } else {
0165         /* assume we want to r/w real data  by default */
0166         ioaddr += MEM_STNAND_DATA;
0167     }
0168     this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr;
0169     if (cmd != NAND_CMD_NONE) {
0170         __raw_writeb(cmd, this->legacy.IO_ADDR_W);
0171         wmb();
0172     }
0173 }
0174 
0175 static int au1300_nand_device_ready(struct nand_chip *this)
0176 {
0177     return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
0178 }
0179 
0180 static struct mtd_partition db1300_nand_parts[] = {
0181     {
0182         .name   = "NAND FS 0",
0183         .offset = 0,
0184         .size   = 8 * 1024 * 1024,
0185     },
0186     {
0187         .name   = "NAND FS 1",
0188         .offset = MTDPART_OFS_APPEND,
0189         .size   = MTDPART_SIZ_FULL
0190     },
0191 };
0192 
0193 struct platform_nand_data db1300_nand_platdata = {
0194     .chip = {
0195         .nr_chips   = 1,
0196         .chip_offset    = 0,
0197         .nr_partitions  = ARRAY_SIZE(db1300_nand_parts),
0198         .partitions = db1300_nand_parts,
0199         .chip_delay = 20,
0200     },
0201     .ctrl = {
0202         .dev_ready  = au1300_nand_device_ready,
0203         .cmd_ctrl   = au1300_nand_cmd_ctrl,
0204     },
0205 };
0206 
0207 static struct resource db1300_nand_res[] = {
0208     [0] = {
0209         .start  = DB1300_NAND_PHYS_ADDR,
0210         .end    = DB1300_NAND_PHYS_ADDR + 0xff,
0211         .flags  = IORESOURCE_MEM,
0212     },
0213 };
0214 
0215 static struct platform_device db1300_nand_dev = {
0216     .name       = "gen_nand",
0217     .num_resources  = ARRAY_SIZE(db1300_nand_res),
0218     .resource   = db1300_nand_res,
0219     .id     = -1,
0220     .dev        = {
0221         .platform_data = &db1300_nand_platdata,
0222     }
0223 };
0224 
0225 /**********************************************************************/
0226 
0227 static struct resource db1300_eth_res[] = {
0228     [0] = {
0229         .start      = DB1300_ETH_PHYS_ADDR,
0230         .end        = DB1300_ETH_PHYS_END,
0231         .flags      = IORESOURCE_MEM,
0232     },
0233     [1] = {
0234         .start      = DB1300_ETH_INT,
0235         .end        = DB1300_ETH_INT,
0236         .flags      = IORESOURCE_IRQ,
0237     },
0238 };
0239 
0240 static struct smsc911x_platform_config db1300_eth_config = {
0241     .phy_interface      = PHY_INTERFACE_MODE_MII,
0242     .irq_polarity       = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
0243     .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
0244     .flags          = SMSC911X_USE_32BIT,
0245 };
0246 
0247 static struct platform_device db1300_eth_dev = {
0248     .name           = "smsc911x",
0249     .id         = -1,
0250     .num_resources      = ARRAY_SIZE(db1300_eth_res),
0251     .resource       = db1300_eth_res,
0252     .dev = {
0253         .platform_data  = &db1300_eth_config,
0254     },
0255 };
0256 
0257 /**********************************************************************/
0258 
0259 static struct resource au1300_psc1_res[] = {
0260     [0] = {
0261         .start  = AU1300_PSC1_PHYS_ADDR,
0262         .end    = AU1300_PSC1_PHYS_ADDR + 0x0fff,
0263         .flags  = IORESOURCE_MEM,
0264     },
0265     [1] = {
0266         .start  = AU1300_PSC1_INT,
0267         .end    = AU1300_PSC1_INT,
0268         .flags  = IORESOURCE_IRQ,
0269     },
0270     [2] = {
0271         .start  = AU1300_DSCR_CMD0_PSC1_TX,
0272         .end    = AU1300_DSCR_CMD0_PSC1_TX,
0273         .flags  = IORESOURCE_DMA,
0274     },
0275     [3] = {
0276         .start  = AU1300_DSCR_CMD0_PSC1_RX,
0277         .end    = AU1300_DSCR_CMD0_PSC1_RX,
0278         .flags  = IORESOURCE_DMA,
0279     },
0280 };
0281 
0282 static struct platform_device db1300_ac97_dev = {
0283     .name       = "au1xpsc_ac97",
0284     .id     = 1,    /* PSC ID. match with AC97 codec ID! */
0285     .num_resources  = ARRAY_SIZE(au1300_psc1_res),
0286     .resource   = au1300_psc1_res,
0287 };
0288 
0289 /**********************************************************************/
0290 
0291 static struct resource au1300_psc2_res[] = {
0292     [0] = {
0293         .start  = AU1300_PSC2_PHYS_ADDR,
0294         .end    = AU1300_PSC2_PHYS_ADDR + 0x0fff,
0295         .flags  = IORESOURCE_MEM,
0296     },
0297     [1] = {
0298         .start  = AU1300_PSC2_INT,
0299         .end    = AU1300_PSC2_INT,
0300         .flags  = IORESOURCE_IRQ,
0301     },
0302     [2] = {
0303         .start  = AU1300_DSCR_CMD0_PSC2_TX,
0304         .end    = AU1300_DSCR_CMD0_PSC2_TX,
0305         .flags  = IORESOURCE_DMA,
0306     },
0307     [3] = {
0308         .start  = AU1300_DSCR_CMD0_PSC2_RX,
0309         .end    = AU1300_DSCR_CMD0_PSC2_RX,
0310         .flags  = IORESOURCE_DMA,
0311     },
0312 };
0313 
0314 static struct platform_device db1300_i2s_dev = {
0315     .name       = "au1xpsc_i2s",
0316     .id     = 2,    /* PSC ID */
0317     .num_resources  = ARRAY_SIZE(au1300_psc2_res),
0318     .resource   = au1300_psc2_res,
0319 };
0320 
0321 /**********************************************************************/
0322 
0323 static struct resource au1300_psc3_res[] = {
0324     [0] = {
0325         .start  = AU1300_PSC3_PHYS_ADDR,
0326         .end    = AU1300_PSC3_PHYS_ADDR + 0x0fff,
0327         .flags  = IORESOURCE_MEM,
0328     },
0329     [1] = {
0330         .start  = AU1300_PSC3_INT,
0331         .end    = AU1300_PSC3_INT,
0332         .flags  = IORESOURCE_IRQ,
0333     },
0334     [2] = {
0335         .start  = AU1300_DSCR_CMD0_PSC3_TX,
0336         .end    = AU1300_DSCR_CMD0_PSC3_TX,
0337         .flags  = IORESOURCE_DMA,
0338     },
0339     [3] = {
0340         .start  = AU1300_DSCR_CMD0_PSC3_RX,
0341         .end    = AU1300_DSCR_CMD0_PSC3_RX,
0342         .flags  = IORESOURCE_DMA,
0343     },
0344 };
0345 
0346 static struct platform_device db1300_i2c_dev = {
0347     .name       = "au1xpsc_smbus",
0348     .id     = 0,    /* bus number */
0349     .num_resources  = ARRAY_SIZE(au1300_psc3_res),
0350     .resource   = au1300_psc3_res,
0351 };
0352 
0353 /**********************************************************************/
0354 
0355 /* proper key assignments when facing the LCD panel.  For key assignments
0356  * according to the schematics swap up with down and left with right.
0357  * I chose to use it to emulate the arrow keys of a keyboard.
0358  */
0359 static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
0360     {
0361         .code           = KEY_DOWN,
0362         .gpio           = AU1300_PIN_LCDPWM0,
0363         .type           = EV_KEY,
0364         .debounce_interval  = 1,
0365         .active_low     = 1,
0366         .desc           = "5waysw-down",
0367     },
0368     {
0369         .code           = KEY_UP,
0370         .gpio           = AU1300_PIN_PSC2SYNC1,
0371         .type           = EV_KEY,
0372         .debounce_interval  = 1,
0373         .active_low     = 1,
0374         .desc           = "5waysw-up",
0375     },
0376     {
0377         .code           = KEY_RIGHT,
0378         .gpio           = AU1300_PIN_WAKE3,
0379         .type           = EV_KEY,
0380         .debounce_interval  = 1,
0381         .active_low     = 1,
0382         .desc           = "5waysw-right",
0383     },
0384     {
0385         .code           = KEY_LEFT,
0386         .gpio           = AU1300_PIN_WAKE2,
0387         .type           = EV_KEY,
0388         .debounce_interval  = 1,
0389         .active_low     = 1,
0390         .desc           = "5waysw-left",
0391     },
0392     {
0393         .code           = KEY_ENTER,
0394         .gpio           = AU1300_PIN_WAKE1,
0395         .type           = EV_KEY,
0396         .debounce_interval  = 1,
0397         .active_low     = 1,
0398         .desc           = "5waysw-push",
0399     },
0400 };
0401 
0402 static struct gpio_keys_platform_data db1300_5waysw_data = {
0403     .buttons    = db1300_5waysw_arrowkeys,
0404     .nbuttons   = ARRAY_SIZE(db1300_5waysw_arrowkeys),
0405     .rep        = 1,
0406     .name       = "db1300-5wayswitch",
0407 };
0408 
0409 static struct platform_device db1300_5waysw_dev = {
0410     .name       = "gpio-keys",
0411     .dev    = {
0412         .platform_data  = &db1300_5waysw_data,
0413     },
0414 };
0415 
0416 /**********************************************************************/
0417 
0418 static struct pata_platform_info db1300_ide_info = {
0419     .ioport_shift   = DB1300_IDE_REG_SHIFT,
0420 };
0421 
0422 #define IDE_ALT_START   (14 << DB1300_IDE_REG_SHIFT)
0423 static struct resource db1300_ide_res[] = {
0424     [0] = {
0425         .start  = DB1300_IDE_PHYS_ADDR,
0426         .end    = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
0427         .flags  = IORESOURCE_MEM,
0428     },
0429     [1] = {
0430         .start  = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
0431         .end    = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
0432         .flags  = IORESOURCE_MEM,
0433     },
0434     [2] = {
0435         .start  = DB1300_IDE_INT,
0436         .end    = DB1300_IDE_INT,
0437         .flags  = IORESOURCE_IRQ,
0438     },
0439 };
0440 
0441 static struct platform_device db1300_ide_dev = {
0442     .dev    = {
0443         .dma_mask       = &au1300_all_dmamask,
0444         .coherent_dma_mask  = DMA_BIT_MASK(32),
0445         .platform_data  = &db1300_ide_info,
0446     },
0447     .name       = "pata_platform",
0448     .resource   = db1300_ide_res,
0449     .num_resources  = ARRAY_SIZE(db1300_ide_res),
0450 };
0451 
0452 /**********************************************************************/
0453 
0454 static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
0455 {
0456     disable_irq_nosync(irq);
0457     return IRQ_WAKE_THREAD;
0458 }
0459 
0460 static irqreturn_t db1300_mmc_cdfn(int irq, void *ptr)
0461 {
0462     void (*mmc_cd)(struct mmc_host *, unsigned long);
0463 
0464     /* link against CONFIG_MMC=m.  We can only be called once MMC core has
0465      * initialized the controller, so symbol_get() should always succeed.
0466      */
0467     mmc_cd = symbol_get(mmc_detect_change);
0468     mmc_cd(ptr, msecs_to_jiffies(200));
0469     symbol_put(mmc_detect_change);
0470 
0471     msleep(100);    /* debounce */
0472     if (irq == DB1300_SD1_INSERT_INT)
0473         enable_irq(DB1300_SD1_EJECT_INT);
0474     else
0475         enable_irq(DB1300_SD1_INSERT_INT);
0476 
0477     return IRQ_HANDLED;
0478 }
0479 
0480 static int db1300_mmc_card_readonly(void *mmc_host)
0481 {
0482     /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
0483     return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
0484 }
0485 
0486 static int db1300_mmc_card_inserted(void *mmc_host)
0487 {
0488     return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
0489 }
0490 
0491 static int db1300_mmc_cd_setup(void *mmc_host, int en)
0492 {
0493     int ret;
0494 
0495     if (en) {
0496         ret = request_threaded_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd,
0497                 db1300_mmc_cdfn, 0, "sd_insert", mmc_host);
0498         if (ret)
0499             goto out;
0500 
0501         ret = request_threaded_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd,
0502                 db1300_mmc_cdfn, 0, "sd_eject", mmc_host);
0503         if (ret) {
0504             free_irq(DB1300_SD1_INSERT_INT, mmc_host);
0505             goto out;
0506         }
0507 
0508         if (db1300_mmc_card_inserted(mmc_host))
0509             enable_irq(DB1300_SD1_EJECT_INT);
0510         else
0511             enable_irq(DB1300_SD1_INSERT_INT);
0512 
0513     } else {
0514         free_irq(DB1300_SD1_INSERT_INT, mmc_host);
0515         free_irq(DB1300_SD1_EJECT_INT, mmc_host);
0516     }
0517     ret = 0;
0518 out:
0519     return ret;
0520 }
0521 
0522 static void db1300_mmcled_set(struct led_classdev *led,
0523                   enum led_brightness brightness)
0524 {
0525     if (brightness != LED_OFF)
0526         bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
0527     else
0528         bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
0529 }
0530 
0531 static struct led_classdev db1300_mmc_led = {
0532     .brightness_set = db1300_mmcled_set,
0533 };
0534 
0535 struct au1xmmc_platform_data db1300_sd1_platdata = {
0536     .cd_setup   = db1300_mmc_cd_setup,
0537     .card_inserted  = db1300_mmc_card_inserted,
0538     .card_readonly  = db1300_mmc_card_readonly,
0539     .led        = &db1300_mmc_led,
0540 };
0541 
0542 static struct resource au1300_sd1_res[] = {
0543     [0] = {
0544         .start  = AU1300_SD1_PHYS_ADDR,
0545         .end    = AU1300_SD1_PHYS_ADDR,
0546         .flags  = IORESOURCE_MEM,
0547     },
0548     [1] = {
0549         .start  = AU1300_SD1_INT,
0550         .end    = AU1300_SD1_INT,
0551         .flags  = IORESOURCE_IRQ,
0552     },
0553     [2] = {
0554         .start  = AU1300_DSCR_CMD0_SDMS_TX1,
0555         .end    = AU1300_DSCR_CMD0_SDMS_TX1,
0556         .flags  = IORESOURCE_DMA,
0557     },
0558     [3] = {
0559         .start  = AU1300_DSCR_CMD0_SDMS_RX1,
0560         .end    = AU1300_DSCR_CMD0_SDMS_RX1,
0561         .flags  = IORESOURCE_DMA,
0562     },
0563 };
0564 
0565 static struct platform_device db1300_sd1_dev = {
0566     .dev = {
0567         .dma_mask       = &au1300_all_dmamask,
0568         .coherent_dma_mask  = DMA_BIT_MASK(32),
0569         .platform_data      = &db1300_sd1_platdata,
0570     },
0571     .name       = "au1xxx-mmc",
0572     .id     = 1,
0573     .resource   = au1300_sd1_res,
0574     .num_resources  = ARRAY_SIZE(au1300_sd1_res),
0575 };
0576 
0577 /**********************************************************************/
0578 
0579 static int db1300_movinand_inserted(void *mmc_host)
0580 {
0581     return 0; /* disable for now, it doesn't work yet */
0582 }
0583 
0584 static int db1300_movinand_readonly(void *mmc_host)
0585 {
0586     return 0;
0587 }
0588 
0589 static void db1300_movinand_led_set(struct led_classdev *led,
0590                     enum led_brightness brightness)
0591 {
0592     if (brightness != LED_OFF)
0593         bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
0594     else
0595         bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
0596 }
0597 
0598 static struct led_classdev db1300_movinand_led = {
0599     .brightness_set     = db1300_movinand_led_set,
0600 };
0601 
0602 struct au1xmmc_platform_data db1300_sd0_platdata = {
0603     .card_inserted      = db1300_movinand_inserted,
0604     .card_readonly      = db1300_movinand_readonly,
0605     .led            = &db1300_movinand_led,
0606     .mask_host_caps     = MMC_CAP_NEEDS_POLL,
0607 };
0608 
0609 static struct resource au1300_sd0_res[] = {
0610     [0] = {
0611         .start  = AU1100_SD0_PHYS_ADDR,
0612         .end    = AU1100_SD0_PHYS_ADDR,
0613         .flags  = IORESOURCE_MEM,
0614     },
0615     [1] = {
0616         .start  = AU1300_SD0_INT,
0617         .end    = AU1300_SD0_INT,
0618         .flags  = IORESOURCE_IRQ,
0619     },
0620     [2] = {
0621         .start  = AU1300_DSCR_CMD0_SDMS_TX0,
0622         .end    = AU1300_DSCR_CMD0_SDMS_TX0,
0623         .flags  = IORESOURCE_DMA,
0624     },
0625     [3] = {
0626         .start  = AU1300_DSCR_CMD0_SDMS_RX0,
0627         .end    = AU1300_DSCR_CMD0_SDMS_RX0,
0628         .flags  = IORESOURCE_DMA,
0629     },
0630 };
0631 
0632 static struct platform_device db1300_sd0_dev = {
0633     .dev = {
0634         .dma_mask       = &au1300_all_dmamask,
0635         .coherent_dma_mask  = DMA_BIT_MASK(32),
0636         .platform_data      = &db1300_sd0_platdata,
0637     },
0638     .name       = "au1xxx-mmc",
0639     .id     = 0,
0640     .resource   = au1300_sd0_res,
0641     .num_resources  = ARRAY_SIZE(au1300_sd0_res),
0642 };
0643 
0644 /**********************************************************************/
0645 
0646 static struct platform_device db1300_wm9715_dev = {
0647     .name       = "wm9712-codec",
0648     .id     = 1,    /* ID of PSC for AC97 audio, see asoc glue! */
0649 };
0650 
0651 static struct platform_device db1300_ac97dma_dev = {
0652     .name       = "au1xpsc-pcm",
0653     .id     = 1,    /* PSC ID */
0654 };
0655 
0656 static struct platform_device db1300_i2sdma_dev = {
0657     .name       = "au1xpsc-pcm",
0658     .id     = 2,    /* PSC ID */
0659 };
0660 
0661 static struct platform_device db1300_sndac97_dev = {
0662     .name       = "db1300-ac97",
0663     .dev = {
0664         .dma_mask       = &au1300_all_dmamask,
0665         .coherent_dma_mask  = DMA_BIT_MASK(32),
0666     },
0667 };
0668 
0669 static struct platform_device db1300_sndi2s_dev = {
0670     .name       = "db1300-i2s",
0671     .dev = {
0672         .dma_mask       = &au1300_all_dmamask,
0673         .coherent_dma_mask  = DMA_BIT_MASK(32),
0674     },
0675 };
0676 
0677 /**********************************************************************/
0678 
0679 static int db1300fb_panel_index(void)
0680 {
0681     return 9;   /* DB1300_800x480 */
0682 }
0683 
0684 static int db1300fb_panel_init(void)
0685 {
0686     /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
0687     bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
0688                  BCSR_BOARD_LCDBL);
0689     return 0;
0690 }
0691 
0692 static int db1300fb_panel_shutdown(void)
0693 {
0694     /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
0695     bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
0696                  BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
0697     return 0;
0698 }
0699 
0700 static struct au1200fb_platdata db1300fb_pd = {
0701     .panel_index    = db1300fb_panel_index,
0702     .panel_init = db1300fb_panel_init,
0703     .panel_shutdown = db1300fb_panel_shutdown,
0704 };
0705 
0706 static struct resource au1300_lcd_res[] = {
0707     [0] = {
0708         .start  = AU1200_LCD_PHYS_ADDR,
0709         .end    = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
0710         .flags  = IORESOURCE_MEM,
0711     },
0712     [1] = {
0713         .start  = AU1300_LCD_INT,
0714         .end    = AU1300_LCD_INT,
0715         .flags  = IORESOURCE_IRQ,
0716     }
0717 };
0718 
0719 
0720 static struct platform_device db1300_lcd_dev = {
0721     .name       = "au1200-lcd",
0722     .id     = 0,
0723     .dev = {
0724         .dma_mask       = &au1300_all_dmamask,
0725         .coherent_dma_mask  = DMA_BIT_MASK(32),
0726         .platform_data      = &db1300fb_pd,
0727     },
0728     .num_resources  = ARRAY_SIZE(au1300_lcd_res),
0729     .resource   = au1300_lcd_res,
0730 };
0731 
0732 /**********************************************************************/
0733 
0734 #if IS_ENABLED(CONFIG_TOUCHSCREEN_WM97XX)
0735 static struct wm97xx_mach_ops db1300_wm97xx_ops = {
0736     .irq_gpio   = WM97XX_GPIO_3,
0737 };
0738 
0739 static int db1300_wm97xx_probe(struct platform_device *pdev)
0740 {
0741     struct wm97xx *wm = platform_get_drvdata(pdev);
0742 
0743     /* external pendown indicator */
0744     wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
0745                WM97XX_GPIO_POL_LOW, WM97XX_GPIO_STICKY,
0746                WM97XX_GPIO_WAKE);
0747 
0748     /* internal "virtual" pendown gpio */
0749     wm97xx_config_gpio(wm, WM97XX_GPIO_3, WM97XX_GPIO_OUT,
0750                WM97XX_GPIO_POL_LOW, WM97XX_GPIO_NOTSTICKY,
0751                WM97XX_GPIO_NOWAKE);
0752 
0753     wm->pen_irq = DB1300_AC97_PEN_INT;
0754 
0755     return wm97xx_register_mach_ops(wm, &db1300_wm97xx_ops);
0756 }
0757 #else
0758 static int db1300_wm97xx_probe(struct platform_device *pdev)
0759 {
0760     return -ENODEV;
0761 }
0762 #endif
0763 
0764 static struct platform_driver db1300_wm97xx_driver = {
0765     .driver.name    = "wm97xx-touch",
0766     .driver.owner   = THIS_MODULE,
0767     .probe      = db1300_wm97xx_probe,
0768 };
0769 
0770 /**********************************************************************/
0771 
0772 static struct platform_device *db1300_dev[] __initdata = {
0773     &db1300_eth_dev,
0774     &db1300_i2c_dev,
0775     &db1300_5waysw_dev,
0776     &db1300_nand_dev,
0777     &db1300_ide_dev,
0778     &db1300_sd0_dev,
0779     &db1300_sd1_dev,
0780     &db1300_lcd_dev,
0781     &db1300_ac97_dev,
0782     &db1300_i2s_dev,
0783     &db1300_wm9715_dev,
0784     &db1300_ac97dma_dev,
0785     &db1300_i2sdma_dev,
0786     &db1300_sndac97_dev,
0787     &db1300_sndi2s_dev,
0788 };
0789 
0790 int __init db1300_dev_setup(void)
0791 {
0792     int swapped, cpldirq;
0793     struct clk *c;
0794 
0795     /* setup CPLD IRQ muxer */
0796     cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
0797     irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
0798     bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
0799 
0800     /* insert/eject IRQs: one always triggers so don't enable them
0801      * when doing request_irq() on them.  DB1200 has this bug too.
0802      */
0803     irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
0804     irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
0805     irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
0806     irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
0807 
0808     /*
0809      * setup board
0810      */
0811     prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
0812 
0813     i2c_register_board_info(0, db1300_i2c_devs,
0814                 ARRAY_SIZE(db1300_i2c_devs));
0815 
0816     if (platform_driver_register(&db1300_wm97xx_driver))
0817         pr_warn("DB1300: failed to init touch pen irq support!\n");
0818 
0819     /* Audio PSC clock is supplied by codecs (PSC1, 2) */
0820     __raw_writel(PSC_SEL_CLK_SERCLK,
0821         (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
0822     wmb();
0823     __raw_writel(PSC_SEL_CLK_SERCLK,
0824         (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
0825     wmb();
0826     /* I2C driver wants 50MHz, get as close as possible */
0827     c = clk_get(NULL, "psc3_intclk");
0828     if (!IS_ERR(c)) {
0829         clk_set_rate(c, 50000000);
0830         clk_prepare_enable(c);
0831         clk_put(c);
0832     }
0833     __raw_writel(PSC_SEL_CLK_INTCLK,
0834         (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
0835     wmb();
0836 
0837     /* enable power to USB ports */
0838     bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
0839 
0840     /* although it is socket #0, it uses the CPLD bits which previous boards
0841      * have used for socket #1.
0842      */
0843     db1x_register_pcmcia_socket(
0844         AU1000_PCMCIA_ATTR_PHYS_ADDR,
0845         AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
0846         AU1000_PCMCIA_MEM_PHYS_ADDR,
0847         AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x00400000 - 1,
0848         AU1000_PCMCIA_IO_PHYS_ADDR,
0849         AU1000_PCMCIA_IO_PHYS_ADDR   + 0x00010000 - 1,
0850         DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
0851 
0852     swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
0853     db1x_register_norflash(64 << 20, 2, swapped);
0854 
0855     return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
0856 }
0857 
0858 
0859 int __init db1300_board_setup(void)
0860 {
0861     unsigned short whoami;
0862 
0863     bcsr_init(DB1300_BCSR_PHYS_ADDR,
0864           DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
0865 
0866     whoami = bcsr_read(BCSR_WHOAMI);
0867     if (BCSR_WHOAMI_BOARD(whoami) != BCSR_WHOAMI_DB1300)
0868         return -ENODEV;
0869 
0870     db1300_gpio_config();
0871 
0872     printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
0873         "BoardID %d   CPLD Rev %d   DaughtercardID %d\n",
0874         BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
0875         BCSR_WHOAMI_DCID(whoami));
0876 
0877     /* enable UARTs, YAMON only enables #2 */
0878     alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
0879     alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
0880     alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
0881 
0882     return 0;
0883 }
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