alchemy/common/setup.c

0001 /*
0002  * Copyright 2000, 2007-2008 MontaVista Software Inc.
0003  * Author: MontaVista Software, Inc. <source@mvista.com
0004  *
0005  * Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc.
0006  *
0007  *  This program is free software; you can redistribute  it and/or modify it
0008  *  under  the terms of  the GNU General  Public License as published by the
0009  *  Free Software Foundation;  either version 2 of the  License, or (at your
0010  *  option) any later version.
0011  *
0012  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
0013  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
0014  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
0015  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
0016  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
0017  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
0018  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
0019  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
0020  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
0021  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0022  *
0023  *  You should have received a copy of the  GNU General Public License along
0024  *  with this program; if not, write  to the Free Software Foundation, Inc.,
0025  *  675 Mass Ave, Cambridge, MA 02139, USA.
0026  */
0027
0028 #include <linux/init.h>
0029 #include <linux/ioport.h>
0030 #include <linux/mm.h>
0031 #include <linux/dma-map-ops.h> /* for dma_default_coherent */
0032
0033 #include <asm/mipsregs.h>
0034
0035 #include <au1000.h>
0036
0037 extern void __init board_setup(void);
0038 extern void __init alchemy_set_lpj(void);
0039
0040 static bool alchemy_dma_coherent(void)
0041 {
0042     switch (alchemy_get_cputype()) {
0043     case ALCHEMY_CPU_AU1000:
0044     case ALCHEMY_CPU_AU1500:
0045     case ALCHEMY_CPU_AU1100:
0046         return false;
0047     case ALCHEMY_CPU_AU1200:
0048         /* Au1200 AB USB does not support coherent memory */
0049         if ((read_c0_prid() & PRID_REV_MASK) == 0)
0050             return false;
0051         return true;
0052     default:
0053         return true;
0054     }
0055 }
0056
0057 void __init plat_mem_setup(void)
0058 {
0059     alchemy_set_lpj();
0060
0061     if (au1xxx_cpu_needs_config_od())
0062         /* Various early Au1xx0 errata corrected by this */
0063         set_c0_config(1 << 19); /* Set Config[OD] */
0064     else
0065         /* Clear to obtain best system bus performance */
0066         clear_c0_config(1 << 19); /* Clear Config[OD] */
0067
0068     dma_default_coherent = alchemy_dma_coherent();
0069
0070     board_setup();  /* board specific setup */
0071
0072     /* IO/MEM resources. */
0073     set_io_port_base(0);
0074     ioport_resource.start = IOPORT_RESOURCE_START;
0075     ioport_resource.end = IOPORT_RESOURCE_END;
0076     iomem_resource.start = IOMEM_RESOURCE_START;
0077     iomem_resource.end = IOMEM_RESOURCE_END;
0078 }
0079
0080 #ifdef CONFIG_MIPS_FIXUP_BIGPHYS_ADDR
0081 /* This routine should be valid for all Au1x based boards */
0082 phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size)
0083 {
0084     unsigned long start = ALCHEMY_PCI_MEMWIN_START;
0085     unsigned long end = ALCHEMY_PCI_MEMWIN_END;
0086
0087     /* Don't fixup 36-bit addresses */
0088     if ((phys_addr >> 32) != 0)
0089         return phys_addr;
0090
0091     /* Check for PCI memory window */
0092     if (phys_addr >= start && (phys_addr + size - 1) <= end)
0093         return (phys_addr_t)(AU1500_PCI_MEM_PHYS_ADDR + phys_addr);
0094
0095     /* default nop */
0096     return phys_addr;
0097 }
0098
0099 int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long vaddr,
0100         unsigned long pfn, unsigned long size, pgprot_t prot)
0101 {
0102     phys_addr_t phys_addr = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
0103
0104     return remap_pfn_range(vma, vaddr, phys_addr >> PAGE_SHIFT, size, prot);
0105 }
0106 EXPORT_SYMBOL(io_remap_pfn_range);
0107 #endif /* CONFIG_MIPS_FIXUP_BIGPHYS_ADDR */