0001
0002 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
0003
0004 #include <linux/linkage.h>
0005 #include <abi/entry.h>
0006
0007 .text
0008
0009
0010
0011
0012
0013
0014
0015 ENTRY(csky_cmpxchg)
0016 USPTOKSP
0017
0018 RD_MEH a3
0019 WR_MEH a3
0020
0021 mfcr a3, epc
0022 addi a3, TRAP0_SIZE
0023
0024 subi sp, 16
0025 stw a3, (sp, 0)
0026 mfcr a3, epsr
0027 stw a3, (sp, 4)
0028 mfcr a3, usp
0029 stw a3, (sp, 8)
0030
0031 psrset ee
0032 #ifdef CONFIG_CPU_HAS_LDSTEX
0033 1:
0034 ldex a3, (a2)
0035 cmpne a0, a3
0036 bt16 2f
0037 mov a3, a1
0038 stex a3, (a2)
0039 bez a3, 1b
0040 2:
0041 sync.is
0042 #else
0043 GLOBAL(csky_cmpxchg_ldw)
0044 ldw a3, (a2)
0045 cmpne a0, a3
0046 bt16 3f
0047 GLOBAL(csky_cmpxchg_stw)
0048 stw a1, (a2)
0049 3:
0050 #endif
0051 mvc a0
0052 ldw a3, (sp, 0)
0053 mtcr a3, epc
0054 ldw a3, (sp, 4)
0055 mtcr a3, epsr
0056 ldw a3, (sp, 8)
0057 mtcr a3, usp
0058 addi sp, 16
0059 KSPTOUSP
0060 rte
0061 END(csky_cmpxchg)