csky/abiv2/memset.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
0003
0004 #include <linux/linkage.h>
0005 #include "sysdep.h"
0006
0007     .weak memset
0008 ENTRY(__memset)
0009 ENTRY(memset)
0010     /* Test if len less than 4 bytes.  */
0011     mov r12, r0
0012     cmplti  r2, 8
0013     bt  .L_set_by_byte
0014
0015     andi    r13, r0, 3
0016     movi    r19, 4
0017     /* Test if dest is not 4 bytes aligned.  */
0018     bnez    r13, .L_dest_not_aligned
0019     /* Hardware can handle unaligned access directly.  */
0020 .L_dest_aligned:
0021         zextb   r3, r1
0022         lsli    r1, 8
0023         or      r1, r3
0024         lsli    r3, r1, 16
0025         or      r3, r1
0026
0027     /* If dest is aligned, then copy.  */
0028     zext    r18, r2, 31, 4
0029     /* Test if len less than 16 bytes.  */
0030     bez r18, .L_len_less_16bytes
0031
0032     LABLE_ALIGN
0033 .L_len_larger_16bytes:
0034     stw r3, (r0, 0)
0035     stw r3, (r0, 4)
0036     stw r3, (r0, 8)
0037     stw r3, (r0, 12)
0038     PRE_BNEZAD (r18)
0039     addi    r0, 16
0040     BNEZAD (r18, .L_len_larger_16bytes)
0041
0042 .L_len_less_16bytes:
0043     zext    r18, r2, 3, 2
0044     andi    r2, 3
0045     bez r18, .L_set_by_byte
0046 .L_len_less_16bytes_loop:
0047     stw r3, (r0, 0)
0048     PRE_BNEZAD (r18)
0049     addi    r0, 4
0050     BNEZAD (r18, .L_len_less_16bytes_loop)
0051
0052     /* Test if len less than 4 bytes.  */
0053 .L_set_by_byte:
0054     zext    r18, r2, 2, 0
0055     bez r18, .L_return
0056 .L_set_by_byte_loop:
0057     stb r1, (r0, 0)
0058     PRE_BNEZAD (r18)
0059     addi    r0, 1
0060     BNEZAD (r18, .L_set_by_byte_loop)
0061
0062 .L_return:
0063     mov r0, r12
0064     rts
0065
0066     /* If dest is not aligned, just set some bytes makes the dest
0067        align.  */
0068
0069 .L_dest_not_aligned:
0070     sub r13, r19, r13
0071     sub r2, r13
0072 .L_dest_not_aligned_loop:
0073     /* Makes the dest align.  */
0074     stb r1, (r0, 0)
0075     PRE_BNEZAD (r13)
0076     addi    r0, 1
0077     BNEZAD (r13, .L_dest_not_aligned_loop)
0078     cmplti  r2, 8
0079     bt  .L_set_by_byte
0080     /* Check whether the src is aligned.  */
0081     jbr .L_dest_aligned
0082 ENDPROC(memset)
0083 ENDPROC(__memset)