inc/abi/pgtable-bits.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002
0003 #ifndef __ASM_CSKY_PGTABLE_BITS_H
0004 #define __ASM_CSKY_PGTABLE_BITS_H
0005
0006 /* implemented in software */
0007 #define _PAGE_PRESENT       (1<<0)
0008 #define _PAGE_READ      (1<<1)
0009 #define _PAGE_WRITE     (1<<2)
0010 #define _PAGE_ACCESSED      (1<<3)
0011 #define _PAGE_MODIFIED      (1<<4)
0012
0013 /* implemented in hardware */
0014 #define _PAGE_GLOBAL        (1<<6)
0015 #define _PAGE_VALID     (1<<7)
0016 #define _PAGE_DIRTY     (1<<8)
0017
0018 #define _PAGE_CACHE     (3<<9)
0019 #define _PAGE_UNCACHE       (2<<9)
0020 #define _PAGE_SO        _PAGE_UNCACHE
0021 #define _CACHE_MASK     (7<<9)
0022
0023 #define _CACHE_CACHED       _PAGE_CACHE
0024 #define _CACHE_UNCACHED     _PAGE_UNCACHE
0025
0026 #define _PAGE_PROT_NONE     _PAGE_READ
0027
0028 /*
0029  * Encode and decode a swap entry
0030  *
0031  * Format of swap PTE:
0032  *     bit          0:    _PAGE_PRESENT (zero)
0033  *     bit          1:    _PAGE_READ (zero)
0034  *     bit      2 - 5:    swap type[0 - 3]
0035  *     bit          6:    _PAGE_GLOBAL (zero)
0036  *     bit          7:    _PAGE_VALID (zero)
0037  *     bit          8:    swap type[4]
0038  *     bit     9 - 31:    swap offset
0039  */
0040 #define __swp_type(x)           ((((x).val >> 2) & 0xf) | \
0041                     (((x).val >> 4) & 0x10))
0042 #define __swp_offset(x)         ((x).val >> 9)
0043 #define __swp_entry(type, offset)   ((swp_entry_t) { \
0044                     ((type & 0xf) << 2) | \
0045                     ((type & 0x10) << 4) | \
0046                     ((offset) << 9)})
0047
0048 #define HAVE_ARCH_UNMAPPED_AREA
0049
0050 #endif /* __ASM_CSKY_PGTABLE_BITS_H */