0001 # SPDX-License-Identifier: GPL-2.0-only
0002 config CSKY
0003 def_bool y
0004 select ARCH_32BIT_OFF_T
0005 select ARCH_HAS_DMA_PREP_COHERENT
0006 select ARCH_HAS_GCOV_PROFILE_ALL
0007 select ARCH_HAS_SYNC_DMA_FOR_CPU
0008 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
0009 select ARCH_USE_BUILTIN_BSWAP
0010 select ARCH_USE_QUEUED_RWLOCKS
0011 select ARCH_USE_QUEUED_SPINLOCKS
0012 select ARCH_INLINE_READ_LOCK if !PREEMPTION
0013 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
0014 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
0015 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
0016 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
0017 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
0018 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
0019 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
0020 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
0021 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
0022 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
0023 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
0024 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
0025 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
0026 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
0027 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
0028 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
0029 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
0030 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
0031 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
0032 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
0033 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
0034 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
0035 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
0036 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
0037 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
0038 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
0039 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
0040 select COMMON_CLK
0041 select CLKSRC_MMIO
0042 select CSKY_MPINTC if CPU_CK860
0043 select CSKY_MP_TIMER if CPU_CK860
0044 select CSKY_APB_INTC
0045 select DMA_DIRECT_REMAP
0046 select IRQ_DOMAIN
0047 select DW_APB_TIMER_OF
0048 select GENERIC_IOREMAP
0049 select GENERIC_LIB_ASHLDI3
0050 select GENERIC_LIB_ASHRDI3
0051 select GENERIC_LIB_LSHRDI3
0052 select GENERIC_LIB_MULDI3
0053 select GENERIC_LIB_CMPDI2
0054 select GENERIC_LIB_UCMPDI2
0055 select GENERIC_ALLOCATOR
0056 select GENERIC_ATOMIC64
0057 select GENERIC_CPU_DEVICES
0058 select GENERIC_IRQ_CHIP
0059 select GENERIC_IRQ_PROBE
0060 select GENERIC_IRQ_SHOW
0061 select GENERIC_IRQ_MULTI_HANDLER
0062 select GENERIC_SCHED_CLOCK
0063 select GENERIC_SMP_IDLE_THREAD
0064 select GENERIC_TIME_VSYSCALL
0065 select GENERIC_VDSO_32
0066 select GENERIC_GETTIMEOFDAY
0067 select GX6605S_TIMER if CPU_CK610
0068 select HAVE_ARCH_TRACEHOOK
0069 select HAVE_ARCH_AUDITSYSCALL
0070 select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
0071 select HAVE_ARCH_JUMP_LABEL_RELATIVE
0072 select HAVE_ARCH_MMAP_RND_BITS
0073 select HAVE_ARCH_SECCOMP_FILTER
0074 select HAVE_CONTEXT_TRACKING_USER
0075 select HAVE_VIRT_CPU_ACCOUNTING_GEN
0076 select HAVE_DEBUG_BUGVERBOSE
0077 select HAVE_DEBUG_KMEMLEAK
0078 select HAVE_DYNAMIC_FTRACE
0079 select HAVE_DYNAMIC_FTRACE_WITH_REGS
0080 select HAVE_GENERIC_VDSO
0081 select HAVE_FUNCTION_TRACER
0082 select HAVE_FUNCTION_GRAPH_TRACER
0083 select HAVE_FUNCTION_ERROR_INJECTION
0084 select HAVE_FTRACE_MCOUNT_RECORD
0085 select HAVE_KERNEL_GZIP
0086 select HAVE_KERNEL_LZO
0087 select HAVE_KERNEL_LZMA
0088 select HAVE_KPROBES if !CPU_CK610
0089 select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
0090 select HAVE_KRETPROBES if !CPU_CK610
0091 select HAVE_PERF_EVENTS
0092 select HAVE_PERF_REGS
0093 select HAVE_PERF_USER_STACK_DUMP
0094 select HAVE_DMA_CONTIGUOUS
0095 select HAVE_REGS_AND_STACK_ACCESS_API
0096 select HAVE_RSEQ
0097 select HAVE_STACKPROTECTOR
0098 select HAVE_SYSCALL_TRACEPOINTS
0099 select MAY_HAVE_SPARSE_IRQ
0100 select MODULES_USE_ELF_RELA if MODULES
0101 select OF
0102 select OF_EARLY_FLATTREE
0103 select PERF_USE_VMALLOC if CPU_CK610
0104 select RTC_LIB
0105 select TIMER_OF
0106 select GENERIC_PCI_IOMAP
0107 select HAVE_PCI
0108 select PCI_DOMAINS_GENERIC if PCI
0109 select PCI_SYSCALL if PCI
0110 select PCI_MSI if PCI
0111 select TRACE_IRQFLAGS_SUPPORT
0112
0113 config LOCKDEP_SUPPORT
0114 def_bool y
0115
0116 config ARCH_SUPPORTS_UPROBES
0117 def_bool y if !CPU_CK610
0118
0119 config CPU_HAS_CACHEV2
0120 bool
0121
0122 config CPU_HAS_FPUV2
0123 bool
0124
0125 config CPU_HAS_HILO
0126 bool
0127
0128 config CPU_HAS_TLBI
0129 bool
0130
0131 config CPU_HAS_LDSTEX
0132 bool
0133 help
0134 For SMP, CPU needs "ldex&stex" instructions for atomic operations.
0135
0136 config CPU_NEED_TLBSYNC
0137 bool
0138
0139 config CPU_NEED_SOFTALIGN
0140 bool
0141
0142 config CPU_NO_USER_BKPT
0143 bool
0144 help
0145 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
0146 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
0147 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
0148 instruction exception.
0149 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
0150
0151 config GENERIC_CALIBRATE_DELAY
0152 def_bool y
0153
0154 config GENERIC_CSUM
0155 def_bool y
0156
0157 config GENERIC_HWEIGHT
0158 def_bool y
0159
0160 config MMU
0161 def_bool y
0162
0163 config STACKTRACE_SUPPORT
0164 def_bool y
0165
0166 config TIME_LOW_RES
0167 def_bool y
0168
0169 config CPU_TLB_SIZE
0170 int
0171 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
0172 default "1024" if (CPU_CK860)
0173
0174 config CPU_ASID_BITS
0175 int
0176 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
0177 default "12" if (CPU_CK860)
0178
0179 config L1_CACHE_SHIFT
0180 int
0181 default "4" if (CPU_CK610)
0182 default "5" if (CPU_CK807 || CPU_CK810)
0183 default "6" if (CPU_CK860)
0184
0185 config ARCH_MMAP_RND_BITS_MIN
0186 default 8
0187
0188 # max bits determined by the following formula:
0189 # VA_BITS - PAGE_SHIFT - 3
0190 config ARCH_MMAP_RND_BITS_MAX
0191 default 17
0192
0193 menu "Processor type and features"
0194
0195 choice
0196 prompt "CPU MODEL"
0197 default CPU_CK807
0198
0199 config CPU_CK610
0200 bool "CSKY CPU ck610"
0201 select CPU_NEED_TLBSYNC
0202 select CPU_NEED_SOFTALIGN
0203 select CPU_NO_USER_BKPT
0204
0205 config CPU_CK810
0206 bool "CSKY CPU ck810"
0207 select CPU_HAS_HILO
0208 select CPU_NEED_TLBSYNC
0209
0210 config CPU_CK807
0211 bool "CSKY CPU ck807"
0212 select CPU_HAS_HILO
0213
0214 config CPU_CK860
0215 bool "CSKY CPU ck860"
0216 select CPU_HAS_TLBI
0217 select CPU_HAS_CACHEV2
0218 select CPU_HAS_LDSTEX
0219 select CPU_HAS_FPUV2
0220 endchoice
0221
0222 choice
0223 prompt "PAGE OFFSET"
0224 default PAGE_OFFSET_80000000
0225
0226 config PAGE_OFFSET_80000000
0227 bool "PAGE OFFSET 2G (user:kernel = 2:2)"
0228
0229 config PAGE_OFFSET_A0000000
0230 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
0231 endchoice
0232
0233 config PAGE_OFFSET
0234 hex
0235 default 0x80000000 if PAGE_OFFSET_80000000
0236 default 0xa0000000 if PAGE_OFFSET_A0000000
0237 choice
0238
0239 prompt "C-SKY PMU type"
0240 depends on PERF_EVENTS
0241 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
0242
0243 config CPU_PMU_NONE
0244 bool "None"
0245
0246 config CSKY_PMU_V1
0247 bool "Performance Monitoring Unit Ver.1"
0248
0249 endchoice
0250
0251 choice
0252 prompt "Power Manager Instruction (wait/doze/stop)"
0253 default CPU_PM_NONE
0254
0255 config CPU_PM_NONE
0256 bool "None"
0257
0258 config CPU_PM_WAIT
0259 bool "wait"
0260
0261 config CPU_PM_DOZE
0262 bool "doze"
0263
0264 config CPU_PM_STOP
0265 bool "stop"
0266 endchoice
0267
0268 menuconfig HAVE_TCM
0269 bool "Tightly-Coupled/Sram Memory"
0270 depends on !COMPILE_TEST
0271 help
0272 The implementation are not only used by TCM (Tightly-Coupled Meory)
0273 but also used by sram on SOC bus. It follow existed linux tcm
0274 software interface, so that old tcm application codes could be
0275 re-used directly.
0276
0277 if HAVE_TCM
0278 config ITCM_RAM_BASE
0279 hex "ITCM ram base"
0280 default 0xffffffff
0281
0282 config ITCM_NR_PAGES
0283 int "Page count of ITCM size: NR*4KB"
0284 range 1 256
0285 default 32
0286
0287 config HAVE_DTCM
0288 bool "DTCM Support"
0289
0290 config DTCM_RAM_BASE
0291 hex "DTCM ram base"
0292 depends on HAVE_DTCM
0293 default 0xffffffff
0294
0295 config DTCM_NR_PAGES
0296 int "Page count of DTCM size: NR*4KB"
0297 depends on HAVE_DTCM
0298 range 1 256
0299 default 32
0300 endif
0301
0302 config CPU_HAS_VDSP
0303 bool "CPU has VDSP coprocessor"
0304 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
0305
0306 config CPU_HAS_FPU
0307 bool "CPU has FPU coprocessor"
0308 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
0309
0310 config CPU_HAS_ICACHE_INS
0311 bool "CPU has Icache invalidate instructions"
0312 depends on CPU_HAS_CACHEV2
0313
0314 config CPU_HAS_TEE
0315 bool "CPU has Trusted Execution Environment"
0316 depends on CPU_CK810
0317
0318 config SMP
0319 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
0320 depends on CPU_CK860
0321 default n
0322
0323 config NR_CPUS
0324 int "Maximum number of CPUs (2-32)"
0325 range 2 32
0326 depends on SMP
0327 default "4"
0328
0329 config HIGHMEM
0330 bool "High Memory Support"
0331 depends on !CPU_CK610
0332 select KMAP_LOCAL
0333 default y
0334
0335 config FORCE_MAX_ZONEORDER
0336 int "Maximum zone order"
0337 default "11"
0338
0339 config DRAM_BASE
0340 hex "DRAM start addr (the same with memory-section in dts)"
0341 default 0x0
0342
0343 config HOTPLUG_CPU
0344 bool "Support for hot-pluggable CPUs"
0345 select GENERIC_IRQ_MIGRATION
0346 depends on SMP
0347 help
0348 Say Y here to allow turning CPUs off and on. CPUs can be
0349 controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
0350
0351 Say N if you want to disable CPU hotplug.
0352
0353 config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
0354 bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
0355 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
0356 help
0357 Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
0358 deal with unaligned access by hardware.
0359
0360 endmenu
0361
0362 source "arch/csky/Kconfig.platforms"
0363
0364 source "kernel/Kconfig.hz"
