arm64/mm/cache.S

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Cache maintenance
0004  *
0005  * Copyright (C) 2001 Deep Blue Solutions Ltd.
0006  * Copyright (C) 2012 ARM Ltd.
0007  */
0008
0009 #include <linux/errno.h>
0010 #include <linux/linkage.h>
0011 #include <linux/init.h>
0012 #include <asm/assembler.h>
0013 #include <asm/cpufeature.h>
0014 #include <asm/alternative.h>
0015 #include <asm/asm-uaccess.h>
0016
0017 /*
0018  *  caches_clean_inval_pou_macro(start,end) [fixup]
0019  *
0020  *  Ensure that the I and D caches are coherent within specified region.
0021  *  This is typically used when code has been written to a memory region,
0022  *  and will be executed.
0023  *
0024  *  - start   - virtual start address of region
0025  *  - end     - virtual end address of region
0026  *  - fixup   - optional label to branch to on user fault
0027  */
0028 .macro  caches_clean_inval_pou_macro, fixup
0029 alternative_if ARM64_HAS_CACHE_IDC
0030     dsb     ishst
0031     b       .Ldc_skip_\@
0032 alternative_else_nop_endif
0033     mov     x2, x0
0034     mov     x3, x1
0035     dcache_by_line_op cvau, ish, x2, x3, x4, x5, \fixup
0036 .Ldc_skip_\@:
0037 alternative_if ARM64_HAS_CACHE_DIC
0038     isb
0039     b   .Lic_skip_\@
0040 alternative_else_nop_endif
0041     invalidate_icache_by_line x0, x1, x2, x3, \fixup
0042 .Lic_skip_\@:
0043 .endm
0044
0045 /*
0046  *  caches_clean_inval_pou(start,end)
0047  *
0048  *  Ensure that the I and D caches are coherent within specified region.
0049  *  This is typically used when code has been written to a memory region,
0050  *  and will be executed.
0051  *
0052  *  - start   - virtual start address of region
0053  *  - end     - virtual end address of region
0054  */
0055 SYM_FUNC_START(caches_clean_inval_pou)
0056     caches_clean_inval_pou_macro
0057     ret
0058 SYM_FUNC_END(caches_clean_inval_pou)
0059
0060 /*
0061  *  caches_clean_inval_user_pou(start,end)
0062  *
0063  *  Ensure that the I and D caches are coherent within specified region.
0064  *  This is typically used when code has been written to a memory region,
0065  *  and will be executed.
0066  *
0067  *  - start   - virtual start address of region
0068  *  - end     - virtual end address of region
0069  */
0070 SYM_FUNC_START(caches_clean_inval_user_pou)
0071     uaccess_ttbr0_enable x2, x3, x4
0072
0073     caches_clean_inval_pou_macro 2f
0074     mov x0, xzr
0075 1:
0076     uaccess_ttbr0_disable x1, x2
0077     ret
0078 2:
0079     mov x0, #-EFAULT
0080     b   1b
0081 SYM_FUNC_END(caches_clean_inval_user_pou)
0082
0083 /*
0084  *  icache_inval_pou(start,end)
0085  *
0086  *  Ensure that the I cache is invalid within specified region.
0087  *
0088  *  - start   - virtual start address of region
0089  *  - end     - virtual end address of region
0090  */
0091 SYM_FUNC_START(icache_inval_pou)
0092 alternative_if ARM64_HAS_CACHE_DIC
0093     isb
0094     ret
0095 alternative_else_nop_endif
0096
0097     invalidate_icache_by_line x0, x1, x2, x3
0098     ret
0099 SYM_FUNC_END(icache_inval_pou)
0100
0101 /*
0102  *  dcache_clean_inval_poc(start, end)
0103  *
0104  *  Ensure that any D-cache lines for the interval [start, end)
0105  *  are cleaned and invalidated to the PoC.
0106  *
0107  *  - start   - virtual start address of region
0108  *  - end     - virtual end address of region
0109  */
0110 SYM_FUNC_START(__pi_dcache_clean_inval_poc)
0111     dcache_by_line_op civac, sy, x0, x1, x2, x3
0112     ret
0113 SYM_FUNC_END(__pi_dcache_clean_inval_poc)
0114 SYM_FUNC_ALIAS(dcache_clean_inval_poc, __pi_dcache_clean_inval_poc)
0115
0116 /*
0117  *  dcache_clean_pou(start, end)
0118  *
0119  *  Ensure that any D-cache lines for the interval [start, end)
0120  *  are cleaned to the PoU.
0121  *
0122  *  - start   - virtual start address of region
0123  *  - end     - virtual end address of region
0124  */
0125 SYM_FUNC_START(dcache_clean_pou)
0126 alternative_if ARM64_HAS_CACHE_IDC
0127     dsb ishst
0128     ret
0129 alternative_else_nop_endif
0130     dcache_by_line_op cvau, ish, x0, x1, x2, x3
0131     ret
0132 SYM_FUNC_END(dcache_clean_pou)
0133
0134 /*
0135  *  dcache_inval_poc(start, end)
0136  *
0137  *  Ensure that any D-cache lines for the interval [start, end)
0138  *  are invalidated. Any partial lines at the ends of the interval are
0139  *  also cleaned to PoC to prevent data loss.
0140  *
0141  *  - start   - kernel start address of region
0142  *  - end     - kernel end address of region
0143  */
0144 SYM_FUNC_START(__pi_dcache_inval_poc)
0145     dcache_line_size x2, x3
0146     sub x3, x2, #1
0147     tst x1, x3              // end cache line aligned?
0148     bic x1, x1, x3
0149     b.eq    1f
0150     dc  civac, x1           // clean & invalidate D / U line
0151 1:  tst x0, x3              // start cache line aligned?
0152     bic x0, x0, x3
0153     b.eq    2f
0154     dc  civac, x0           // clean & invalidate D / U line
0155     b   3f
0156 2:  dc  ivac, x0            // invalidate D / U line
0157 3:  add x0, x0, x2
0158     cmp x0, x1
0159     b.lo    2b
0160     dsb sy
0161     ret
0162 SYM_FUNC_END(__pi_dcache_inval_poc)
0163 SYM_FUNC_ALIAS(dcache_inval_poc, __pi_dcache_inval_poc)
0164
0165 /*
0166  *  dcache_clean_poc(start, end)
0167  *
0168  *  Ensure that any D-cache lines for the interval [start, end)
0169  *  are cleaned to the PoC.
0170  *
0171  *  - start   - virtual start address of region
0172  *  - end     - virtual end address of region
0173  */
0174 SYM_FUNC_START(__pi_dcache_clean_poc)
0175     dcache_by_line_op cvac, sy, x0, x1, x2, x3
0176     ret
0177 SYM_FUNC_END(__pi_dcache_clean_poc)
0178 SYM_FUNC_ALIAS(dcache_clean_poc, __pi_dcache_clean_poc)
0179
0180 /*
0181  *  dcache_clean_pop(start, end)
0182  *
0183  *  Ensure that any D-cache lines for the interval [start, end)
0184  *  are cleaned to the PoP.
0185  *
0186  *  - start   - virtual start address of region
0187  *  - end     - virtual end address of region
0188  */
0189 SYM_FUNC_START(__pi_dcache_clean_pop)
0190     alternative_if_not ARM64_HAS_DCPOP
0191     b   dcache_clean_poc
0192     alternative_else_nop_endif
0193     dcache_by_line_op cvap, sy, x0, x1, x2, x3
0194     ret
0195 SYM_FUNC_END(__pi_dcache_clean_pop)
0196 SYM_FUNC_ALIAS(dcache_clean_pop, __pi_dcache_clean_pop)