kvm/hyp/aarch32.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Hyp portion of the (not much of an) Emulation layer for 32bit guests.
0004  *
0005  * Copyright (C) 2012,2013 - ARM Ltd
0006  * Author: Marc Zyngier <marc.zyngier@arm.com>
0007  *
0008  * based on arch/arm/kvm/emulate.c
0009  * Copyright (C) 2012 - Virtual Open Systems and Columbia University
0010  * Author: Christoffer Dall <c.dall@virtualopensystems.com>
0011  */
0012
0013 #include <linux/kvm_host.h>
0014 #include <asm/kvm_emulate.h>
0015 #include <asm/kvm_hyp.h>
0016
0017 /*
0018  * stolen from arch/arm/kernel/opcodes.c
0019  *
0020  * condition code lookup table
0021  * index into the table is test code: EQ, NE, ... LT, GT, AL, NV
0022  *
0023  * bit position in short is condition code: NZCV
0024  */
0025 static const unsigned short cc_map[16] = {
0026     0xF0F0,         /* EQ == Z set            */
0027     0x0F0F,         /* NE                     */
0028     0xCCCC,         /* CS == C set            */
0029     0x3333,         /* CC                     */
0030     0xFF00,         /* MI == N set            */
0031     0x00FF,         /* PL                     */
0032     0xAAAA,         /* VS == V set            */
0033     0x5555,         /* VC                     */
0034     0x0C0C,         /* HI == C set && Z clear */
0035     0xF3F3,         /* LS == C clear || Z set */
0036     0xAA55,         /* GE == (N==V)           */
0037     0x55AA,         /* LT == (N!=V)           */
0038     0x0A05,         /* GT == (!Z && (N==V))   */
0039     0xF5FA,         /* LE == (Z || (N!=V))    */
0040     0xFFFF,         /* AL always              */
0041     0           /* NV                     */
0042 };
0043
0044 /*
0045  * Check if a trapped instruction should have been executed or not.
0046  */
0047 bool kvm_condition_valid32(const struct kvm_vcpu *vcpu)
0048 {
0049     unsigned long cpsr;
0050     u32 cpsr_cond;
0051     int cond;
0052
0053     /* Top two bits non-zero?  Unconditional. */
0054     if (kvm_vcpu_get_esr(vcpu) >> 30)
0055         return true;
0056
0057     /* Is condition field valid? */
0058     cond = kvm_vcpu_get_condition(vcpu);
0059     if (cond == 0xE)
0060         return true;
0061
0062     cpsr = *vcpu_cpsr(vcpu);
0063
0064     if (cond < 0) {
0065         /* This can happen in Thumb mode: examine IT state. */
0066         unsigned long it;
0067
0068         it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3);
0069
0070         /* it == 0 => unconditional. */
0071         if (it == 0)
0072             return true;
0073
0074         /* The cond for this insn works out as the top 4 bits. */
0075         cond = (it >> 4);
0076     }
0077
0078     cpsr_cond = cpsr >> 28;
0079
0080     if (!((cc_map[cond] >> cpsr_cond) & 1))
0081         return false;
0082
0083     return true;
0084 }
0085
0086 /**
0087  * adjust_itstate - adjust ITSTATE when emulating instructions in IT-block
0088  * @vcpu:   The VCPU pointer
0089  *
0090  * When exceptions occur while instructions are executed in Thumb IF-THEN
0091  * blocks, the ITSTATE field of the CPSR is not advanced (updated), so we have
0092  * to do this little bit of work manually. The fields map like this:
0093  *
0094  * IT[7:0] -> CPSR[26:25],CPSR[15:10]
0095  */
0096 static void kvm_adjust_itstate(struct kvm_vcpu *vcpu)
0097 {
0098     unsigned long itbits, cond;
0099     unsigned long cpsr = *vcpu_cpsr(vcpu);
0100     bool is_arm = !(cpsr & PSR_AA32_T_BIT);
0101
0102     if (is_arm || !(cpsr & PSR_AA32_IT_MASK))
0103         return;
0104
0105     cond = (cpsr & 0xe000) >> 13;
0106     itbits = (cpsr & 0x1c00) >> (10 - 2);
0107     itbits |= (cpsr & (0x3 << 25)) >> 25;
0108
0109     /* Perform ITAdvance (see page A2-52 in ARM DDI 0406C) */
0110     if ((itbits & 0x7) == 0)
0111         itbits = cond = 0;
0112     else
0113         itbits = (itbits << 1) & 0x1f;
0114
0115     cpsr &= ~PSR_AA32_IT_MASK;
0116     cpsr |= cond << 13;
0117     cpsr |= (itbits & 0x1c) << (10 - 2);
0118     cpsr |= (itbits & 0x3) << 25;
0119     *vcpu_cpsr(vcpu) = cpsr;
0120 }
0121
0122 /**
0123  * kvm_skip_instr - skip a trapped instruction and proceed to the next
0124  * @vcpu: The vcpu pointer
0125  */
0126 void kvm_skip_instr32(struct kvm_vcpu *vcpu)
0127 {
0128     u32 pc = *vcpu_pc(vcpu);
0129     bool is_thumb;
0130
0131     is_thumb = !!(*vcpu_cpsr(vcpu) & PSR_AA32_T_BIT);
0132     if (is_thumb && !kvm_vcpu_trap_il_is32bit(vcpu))
0133         pc += 2;
0134     else
0135         pc += 4;
0136
0137     *vcpu_pc(vcpu) = pc;
0138
0139     kvm_adjust_itstate(vcpu);
0140 }