arm64/kernel/sleep.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #include <linux/errno.h>
0003 #include <linux/linkage.h>
0004 #include <asm/asm-offsets.h>
0005 #include <asm/assembler.h>
0006 #include <asm/smp.h>
0007
0008     .text
0009 /*
0010  * Implementation of MPIDR_EL1 hash algorithm through shifting
0011  * and OR'ing.
0012  *
0013  * @dst: register containing hash result
0014  * @rs0: register containing affinity level 0 bit shift
0015  * @rs1: register containing affinity level 1 bit shift
0016  * @rs2: register containing affinity level 2 bit shift
0017  * @rs3: register containing affinity level 3 bit shift
0018  * @mpidr: register containing MPIDR_EL1 value
0019  * @mask: register containing MPIDR mask
0020  *
0021  * Pseudo C-code:
0022  *
0023  *u32 dst;
0024  *
0025  *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
0026  *  u32 aff0, aff1, aff2, aff3;
0027  *  u64 mpidr_masked = mpidr & mask;
0028  *  aff0 = mpidr_masked & 0xff;
0029  *  aff1 = mpidr_masked & 0xff00;
0030  *  aff2 = mpidr_masked & 0xff0000;
0031  *  aff3 = mpidr_masked & 0xff00000000;
0032  *  dst = (aff0 >> rs0 | aff1 >> rs1 | aff2 >> rs2 | aff3 >> rs3);
0033  *}
0034  * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
0035  * Output register: dst
0036  * Note: input and output registers must be disjoint register sets
0037          (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
0038  */
0039     .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
0040     and \mpidr, \mpidr, \mask       // mask out MPIDR bits
0041     and \dst, \mpidr, #0xff     // mask=aff0
0042     lsr \dst ,\dst, \rs0        // dst=aff0>>rs0
0043     and \mask, \mpidr, #0xff00      // mask = aff1
0044     lsr \mask ,\mask, \rs1
0045     orr \dst, \dst, \mask       // dst|=(aff1>>rs1)
0046     and \mask, \mpidr, #0xff0000    // mask = aff2
0047     lsr \mask ,\mask, \rs2
0048     orr \dst, \dst, \mask       // dst|=(aff2>>rs2)
0049     and \mask, \mpidr, #0xff00000000    // mask = aff3
0050     lsr \mask ,\mask, \rs3
0051     orr \dst, \dst, \mask       // dst|=(aff3>>rs3)
0052     .endm
0053 /*
0054  * Save CPU state in the provided sleep_stack_data area, and publish its
0055  * location for cpu_resume()'s use in sleep_save_stash.
0056  *
0057  * cpu_resume() will restore this saved state, and return. Because the
0058  * link-register is saved and restored, it will appear to return from this
0059  * function. So that the caller can tell the suspend/resume paths apart,
0060  * __cpu_suspend_enter() will always return a non-zero value, whereas the
0061  * path through cpu_resume() will return 0.
0062  *
0063  *  x0 = struct sleep_stack_data area
0064  */
0065 SYM_FUNC_START(__cpu_suspend_enter)
0066     stp x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
0067     stp x19, x20, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+16]
0068     stp x21, x22, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+32]
0069     stp x23, x24, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+48]
0070     stp x25, x26, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+64]
0071     stp x27, x28, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+80]
0072
0073     /* save the sp in cpu_suspend_ctx */
0074     mov x2, sp
0075     str x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
0076
0077     /* find the mpidr_hash */
0078     ldr_l   x1, sleep_save_stash
0079     mrs x7, mpidr_el1
0080     adr_l   x9, mpidr_hash
0081     ldr x10, [x9, #MPIDR_HASH_MASK]
0082     /*
0083      * Following code relies on the struct mpidr_hash
0084      * members size.
0085      */
0086     ldp w3, w4, [x9, #MPIDR_HASH_SHIFTS]
0087     ldp w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
0088     compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
0089     add x1, x1, x8, lsl #3
0090
0091     str x0, [x1]
0092     add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
0093     stp x29, lr, [sp, #-16]!
0094     bl  cpu_do_suspend
0095     ldp x29, lr, [sp], #16
0096     mov x0, #1
0097     ret
0098 SYM_FUNC_END(__cpu_suspend_enter)
0099
0100     .pushsection ".idmap.text", "awx"
0101 SYM_CODE_START(cpu_resume)
0102     bl  init_kernel_el
0103     bl  finalise_el2
0104 #if VA_BITS > 48
0105     ldr_l   x0, vabits_actual
0106 #endif
0107     bl  __cpu_setup
0108     /* enable the MMU early - so we can access sleep_save_stash by va */
0109     adrp    x1, swapper_pg_dir
0110     adrp    x2, idmap_pg_dir
0111     bl  __enable_mmu
0112     ldr x8, =_cpu_resume
0113     br  x8
0114 SYM_CODE_END(cpu_resume)
0115     .ltorg
0116     .popsection
0117
0118 SYM_FUNC_START(_cpu_resume)
0119     mrs x1, mpidr_el1
0120     adr_l   x8, mpidr_hash      // x8 = struct mpidr_hash virt address
0121
0122     /* retrieve mpidr_hash members to compute the hash */
0123     ldr x2, [x8, #MPIDR_HASH_MASK]
0124     ldp w3, w4, [x8, #MPIDR_HASH_SHIFTS]
0125     ldp w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)]
0126     compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2
0127
0128     /* x7 contains hash index, let's use it to grab context pointer */
0129     ldr_l   x0, sleep_save_stash
0130     ldr x0, [x0, x7, lsl #3]
0131     add x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
0132     add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
0133     /* load sp from context */
0134     ldr x2, [x0, #CPU_CTX_SP]
0135     mov sp, x2
0136     /*
0137      * cpu_do_resume expects x0 to contain context address pointer
0138      */
0139     bl  cpu_do_resume
0140
0141 #if defined(CONFIG_KASAN) && defined(CONFIG_KASAN_STACK)
0142     mov x0, sp
0143     bl  kasan_unpoison_task_stack_below
0144 #endif
0145
0146     ldp x19, x20, [x29, #16]
0147     ldp x21, x22, [x29, #32]
0148     ldp x23, x24, [x29, #48]
0149     ldp x25, x26, [x29, #64]
0150     ldp x27, x28, [x29, #80]
0151     ldp x29, lr, [x29]
0152     mov x0, #0
0153     ret
0154 SYM_FUNC_END(_cpu_resume)