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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * FP/SIMD state saving and restoring
0004  *
0005  * Copyright (C) 2012 ARM Ltd.
0006  * Author: Catalin Marinas <catalin.marinas@arm.com>
0007  */
0008 
0009 #include <linux/linkage.h>
0010 
0011 #include <asm/assembler.h>
0012 #include <asm/fpsimdmacros.h>
0013 
0014 /*
0015  * Save the FP registers.
0016  *
0017  * x0 - pointer to struct fpsimd_state
0018  */
0019 SYM_FUNC_START(fpsimd_save_state)
0020     fpsimd_save x0, 8
0021     ret
0022 SYM_FUNC_END(fpsimd_save_state)
0023 
0024 /*
0025  * Load the FP registers.
0026  *
0027  * x0 - pointer to struct fpsimd_state
0028  */
0029 SYM_FUNC_START(fpsimd_load_state)
0030     fpsimd_restore x0, 8
0031     ret
0032 SYM_FUNC_END(fpsimd_load_state)
0033 
0034 #ifdef CONFIG_ARM64_SVE
0035 
0036 /*
0037  * Save the SVE state
0038  *
0039  * x0 - pointer to buffer for state
0040  * x1 - pointer to storage for FPSR
0041  * x2 - Save FFR if non-zero
0042  */
0043 SYM_FUNC_START(sve_save_state)
0044     sve_save 0, x1, x2, 3
0045     ret
0046 SYM_FUNC_END(sve_save_state)
0047 
0048 /*
0049  * Load the SVE state
0050  *
0051  * x0 - pointer to buffer for state
0052  * x1 - pointer to storage for FPSR
0053  * x2 - Restore FFR if non-zero
0054  */
0055 SYM_FUNC_START(sve_load_state)
0056     sve_load 0, x1, x2, 4
0057     ret
0058 SYM_FUNC_END(sve_load_state)
0059 
0060 SYM_FUNC_START(sve_get_vl)
0061     _sve_rdvl   0, 1
0062     ret
0063 SYM_FUNC_END(sve_get_vl)
0064 
0065 SYM_FUNC_START(sve_set_vq)
0066     sve_load_vq x0, x1, x2
0067     ret
0068 SYM_FUNC_END(sve_set_vq)
0069 
0070 /*
0071  * Zero all SVE registers but the first 128-bits of each vector
0072  *
0073  * VQ must already be configured by caller, any further updates of VQ
0074  * will need to ensure that the register state remains valid.
0075  *
0076  * x0 = include FFR?
0077  * x1 = VQ - 1
0078  */
0079 SYM_FUNC_START(sve_flush_live)
0080     cbz     x1, 1f  // A VQ-1 of 0 is 128 bits so no extra Z state
0081     sve_flush_z
0082 1:  sve_flush_p
0083     tbz     x0, #0, 2f
0084     sve_flush_ffr
0085 2:  ret
0086 SYM_FUNC_END(sve_flush_live)
0087 
0088 #endif /* CONFIG_ARM64_SVE */
0089 
0090 #ifdef CONFIG_ARM64_SME
0091 
0092 SYM_FUNC_START(sme_get_vl)
0093     _sme_rdsvl  0, 1
0094     ret
0095 SYM_FUNC_END(sme_get_vl)
0096 
0097 SYM_FUNC_START(sme_set_vq)
0098     sme_load_vq x0, x1, x2
0099     ret
0100 SYM_FUNC_END(sme_set_vq)
0101 
0102 /*
0103  * Save the SME state
0104  *
0105  * x0 - pointer to buffer for state
0106  */
0107 SYM_FUNC_START(za_save_state)
0108     _sme_rdsvl  1, 1        // x1 = VL/8
0109     sme_save_za 0, x1, 12
0110     ret
0111 SYM_FUNC_END(za_save_state)
0112 
0113 /*
0114  * Load the SME state
0115  *
0116  * x0 - pointer to buffer for state
0117  */
0118 SYM_FUNC_START(za_load_state)
0119     _sme_rdsvl  1, 1        // x1 = VL/8
0120     sme_load_za 0, x1, 12
0121     ret
0122 SYM_FUNC_END(za_load_state)
0123 
0124 #endif /* CONFIG_ARM64_SME */