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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * CPU reset routines
0004  *
0005  * Copyright (C) 2001 Deep Blue Solutions Ltd.
0006  * Copyright (C) 2012 ARM Ltd.
0007  * Copyright (C) 2015 Huawei Futurewei Technologies.
0008  */
0009 
0010 #include <linux/linkage.h>
0011 #include <asm/assembler.h>
0012 #include <asm/sysreg.h>
0013 #include <asm/virt.h>
0014 
0015 .text
0016 .pushsection    .idmap.text, "awx"
0017 
0018 /*
0019  * cpu_soft_restart(el2_switch, entry, arg0, arg1, arg2)
0020  *
0021  * @el2_switch: Flag to indicate a switch to EL2 is needed.
0022  * @entry: Location to jump to for soft reset.
0023  * arg0: First argument passed to @entry. (relocation list)
0024  * arg1: Second argument passed to @entry.(physical kernel entry)
0025  * arg2: Third argument passed to @entry. (physical dtb address)
0026  *
0027  * Put the CPU into the same state as it would be if it had been reset, and
0028  * branch to what would be the reset vector. It must be executed with the
0029  * flat identity mapping.
0030  */
0031 SYM_CODE_START(cpu_soft_restart)
0032     mov_q   x12, INIT_SCTLR_EL1_MMU_OFF
0033     pre_disable_mmu_workaround
0034     /*
0035      * either disable EL1&0 translation regime or disable EL2&0 translation
0036      * regime if HCR_EL2.E2H == 1
0037      */
0038     msr sctlr_el1, x12
0039     isb
0040 
0041     cbz x0, 1f              // el2_switch?
0042     mov x0, #HVC_SOFT_RESTART
0043     hvc #0              // no return
0044 
0045 1:  mov x8, x1              // entry
0046     mov x0, x2              // arg0
0047     mov x1, x3              // arg1
0048     mov x2, x4              // arg2
0049     br  x8
0050 SYM_CODE_END(cpu_soft_restart)
0051 
0052 .popsection