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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Based on arch/arm/include/asm/memory.h
0004  *
0005  * Copyright (C) 2000-2002 Russell King
0006  * Copyright (C) 2012 ARM Ltd.
0007  *
0008  * Note: this file should not be included by non-asm/.h files
0009  */
0010 #ifndef __ASM_MEMORY_H
0011 #define __ASM_MEMORY_H
0012 
0013 #include <linux/const.h>
0014 #include <linux/sizes.h>
0015 #include <asm/page-def.h>
0016 
0017 /*
0018  * Size of the PCI I/O space. This must remain a power of two so that
0019  * IO_SPACE_LIMIT acts as a mask for the low bits of I/O addresses.
0020  */
0021 #define PCI_IO_SIZE     SZ_16M
0022 
0023 /*
0024  * VMEMMAP_SIZE - allows the whole linear region to be covered by
0025  *                a struct page array
0026  *
0027  * If we are configured with a 52-bit kernel VA then our VMEMMAP_SIZE
0028  * needs to cover the memory region from the beginning of the 52-bit
0029  * PAGE_OFFSET all the way to PAGE_END for 48-bit. This allows us to
0030  * keep a constant PAGE_OFFSET and "fallback" to using the higher end
0031  * of the VMEMMAP where 52-bit support is not available in hardware.
0032  */
0033 #define VMEMMAP_SHIFT   (PAGE_SHIFT - STRUCT_PAGE_MAX_SHIFT)
0034 #define VMEMMAP_SIZE    ((_PAGE_END(VA_BITS_MIN) - PAGE_OFFSET) >> VMEMMAP_SHIFT)
0035 
0036 /*
0037  * PAGE_OFFSET - the virtual address of the start of the linear map, at the
0038  *               start of the TTBR1 address space.
0039  * PAGE_END - the end of the linear map, where all other kernel mappings begin.
0040  * KIMAGE_VADDR - the virtual address of the start of the kernel image.
0041  * VA_BITS - the maximum number of bits for virtual addresses.
0042  */
0043 #define VA_BITS         (CONFIG_ARM64_VA_BITS)
0044 #define _PAGE_OFFSET(va)    (-(UL(1) << (va)))
0045 #define PAGE_OFFSET     (_PAGE_OFFSET(VA_BITS))
0046 #define KIMAGE_VADDR        (MODULES_END)
0047 #define MODULES_END     (MODULES_VADDR + MODULES_VSIZE)
0048 #define MODULES_VADDR       (_PAGE_END(VA_BITS_MIN))
0049 #define MODULES_VSIZE       (SZ_128M)
0050 #define VMEMMAP_START       (-(UL(1) << (VA_BITS - VMEMMAP_SHIFT)))
0051 #define VMEMMAP_END     (VMEMMAP_START + VMEMMAP_SIZE)
0052 #define PCI_IO_END      (VMEMMAP_START - SZ_8M)
0053 #define PCI_IO_START        (PCI_IO_END - PCI_IO_SIZE)
0054 #define FIXADDR_TOP     (VMEMMAP_START - SZ_32M)
0055 
0056 #if VA_BITS > 48
0057 #define VA_BITS_MIN     (48)
0058 #else
0059 #define VA_BITS_MIN     (VA_BITS)
0060 #endif
0061 
0062 #define _PAGE_END(va)       (-(UL(1) << ((va) - 1)))
0063 
0064 #define KERNEL_START        _text
0065 #define KERNEL_END      _end
0066 
0067 /*
0068  * Generic and tag-based KASAN require 1/8th and 1/16th of the kernel virtual
0069  * address space for the shadow region respectively. They can bloat the stack
0070  * significantly, so double the (minimum) stack size when they are in use.
0071  */
0072 #if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
0073 #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
0074 #define KASAN_SHADOW_END    ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) \
0075                     + KASAN_SHADOW_OFFSET)
0076 #define PAGE_END        (KASAN_SHADOW_END - (1UL << (vabits_actual - KASAN_SHADOW_SCALE_SHIFT)))
0077 #define KASAN_THREAD_SHIFT  1
0078 #else
0079 #define KASAN_THREAD_SHIFT  0
0080 #define PAGE_END        (_PAGE_END(VA_BITS_MIN))
0081 #endif /* CONFIG_KASAN */
0082 
0083 #define MIN_THREAD_SHIFT    (14 + KASAN_THREAD_SHIFT)
0084 
0085 /*
0086  * VMAP'd stacks are allocated at page granularity, so we must ensure that such
0087  * stacks are a multiple of page size.
0088  */
0089 #if defined(CONFIG_VMAP_STACK) && (MIN_THREAD_SHIFT < PAGE_SHIFT)
0090 #define THREAD_SHIFT        PAGE_SHIFT
0091 #else
0092 #define THREAD_SHIFT        MIN_THREAD_SHIFT
0093 #endif
0094 
0095 #if THREAD_SHIFT >= PAGE_SHIFT
0096 #define THREAD_SIZE_ORDER   (THREAD_SHIFT - PAGE_SHIFT)
0097 #endif
0098 
0099 #define THREAD_SIZE     (UL(1) << THREAD_SHIFT)
0100 
0101 /*
0102  * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by
0103  * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry
0104  * assembly.
0105  */
0106 #ifdef CONFIG_VMAP_STACK
0107 #define THREAD_ALIGN        (2 * THREAD_SIZE)
0108 #else
0109 #define THREAD_ALIGN        THREAD_SIZE
0110 #endif
0111 
0112 #define IRQ_STACK_SIZE      THREAD_SIZE
0113 
0114 #define OVERFLOW_STACK_SIZE SZ_4K
0115 
0116 /*
0117  * With the minimum frame size of [x29, x30], exactly half the combined
0118  * sizes of the hyp and overflow stacks is the maximum size needed to
0119  * save the unwinded stacktrace; plus an additional entry to delimit the
0120  * end.
0121  */
0122 #define NVHE_STACKTRACE_SIZE    ((OVERFLOW_STACK_SIZE + PAGE_SIZE) / 2 + sizeof(long))
0123 
0124 /*
0125  * Alignment of kernel segments (e.g. .text, .data).
0126  *
0127  *  4 KB granule:  16 level 3 entries, with contiguous bit
0128  * 16 KB granule:   4 level 3 entries, without contiguous bit
0129  * 64 KB granule:   1 level 3 entry
0130  */
0131 #define SEGMENT_ALIGN       SZ_64K
0132 
0133 /*
0134  * Memory types available.
0135  *
0136  * IMPORTANT: MT_NORMAL must be index 0 since vm_get_page_prot() may 'or' in
0137  *        the MT_NORMAL_TAGGED memory type for PROT_MTE mappings. Note
0138  *        that protection_map[] only contains MT_NORMAL attributes.
0139  */
0140 #define MT_NORMAL       0
0141 #define MT_NORMAL_TAGGED    1
0142 #define MT_NORMAL_NC        2
0143 #define MT_DEVICE_nGnRnE    3
0144 #define MT_DEVICE_nGnRE     4
0145 
0146 /*
0147  * Memory types for Stage-2 translation
0148  */
0149 #define MT_S2_NORMAL        0xf
0150 #define MT_S2_DEVICE_nGnRE  0x1
0151 
0152 /*
0153  * Memory types for Stage-2 translation when ID_AA64MMFR2_EL1.FWB is 0001
0154  * Stage-2 enforces Normal-WB and Device-nGnRE
0155  */
0156 #define MT_S2_FWB_NORMAL    6
0157 #define MT_S2_FWB_DEVICE_nGnRE  1
0158 
0159 #ifdef CONFIG_ARM64_4K_PAGES
0160 #define IOREMAP_MAX_ORDER   (PUD_SHIFT)
0161 #else
0162 #define IOREMAP_MAX_ORDER   (PMD_SHIFT)
0163 #endif
0164 
0165 /*
0166  *  Open-coded (swapper_pg_dir - reserved_pg_dir) as this cannot be calculated
0167  *  until link time.
0168  */
0169 #define RESERVED_SWAPPER_OFFSET (PAGE_SIZE)
0170 
0171 /*
0172  *  Open-coded (swapper_pg_dir - tramp_pg_dir) as this cannot be calculated
0173  *  until link time.
0174  */
0175 #define TRAMP_SWAPPER_OFFSET    (2 * PAGE_SIZE)
0176 
0177 #ifndef __ASSEMBLY__
0178 
0179 #include <linux/bitops.h>
0180 #include <linux/compiler.h>
0181 #include <linux/mmdebug.h>
0182 #include <linux/types.h>
0183 #include <asm/bug.h>
0184 
0185 #if VA_BITS > 48
0186 extern u64          vabits_actual;
0187 #else
0188 #define vabits_actual       ((u64)VA_BITS)
0189 #endif
0190 
0191 extern s64          memstart_addr;
0192 /* PHYS_OFFSET - the physical address of the start of memory. */
0193 #define PHYS_OFFSET     ({ VM_BUG_ON(memstart_addr & 1); memstart_addr; })
0194 
0195 /* the virtual base of the kernel image */
0196 extern u64          kimage_vaddr;
0197 
0198 /* the offset between the kernel virtual and physical mappings */
0199 extern u64          kimage_voffset;
0200 
0201 static inline unsigned long kaslr_offset(void)
0202 {
0203     return kimage_vaddr - KIMAGE_VADDR;
0204 }
0205 
0206 /*
0207  * Allow all memory at the discovery stage. We will clip it later.
0208  */
0209 #define MIN_MEMBLOCK_ADDR   0
0210 #define MAX_MEMBLOCK_ADDR   U64_MAX
0211 
0212 /*
0213  * PFNs are used to describe any physical page; this means
0214  * PFN 0 == physical address 0.
0215  *
0216  * This is the PFN of the first RAM page in the kernel
0217  * direct-mapped view.  We assume this is the first page
0218  * of RAM in the mem_map as well.
0219  */
0220 #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
0221 
0222 /*
0223  * When dealing with data aborts, watchpoints, or instruction traps we may end
0224  * up with a tagged userland pointer. Clear the tag to get a sane pointer to
0225  * pass on to access_ok(), for instance.
0226  */
0227 #define __untagged_addr(addr)   \
0228     ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55))
0229 
0230 #define untagged_addr(addr) ({                  \
0231     u64 __addr = (__force u64)(addr);                   \
0232     __addr &= __untagged_addr(__addr);              \
0233     (__force __typeof__(addr))__addr;               \
0234 })
0235 
0236 #if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS)
0237 #define __tag_shifted(tag)  ((u64)(tag) << 56)
0238 #define __tag_reset(addr)   __untagged_addr(addr)
0239 #define __tag_get(addr)     (__u8)((u64)(addr) >> 56)
0240 #else
0241 #define __tag_shifted(tag)  0UL
0242 #define __tag_reset(addr)   (addr)
0243 #define __tag_get(addr)     0
0244 #endif /* CONFIG_KASAN_SW_TAGS || CONFIG_KASAN_HW_TAGS */
0245 
0246 static inline const void *__tag_set(const void *addr, u8 tag)
0247 {
0248     u64 __addr = (u64)addr & ~__tag_shifted(0xff);
0249     return (const void *)(__addr | __tag_shifted(tag));
0250 }
0251 
0252 #ifdef CONFIG_KASAN_HW_TAGS
0253 #define arch_enable_tagging_sync()      mte_enable_kernel_sync()
0254 #define arch_enable_tagging_async()     mte_enable_kernel_async()
0255 #define arch_enable_tagging_asymm()     mte_enable_kernel_asymm()
0256 #define arch_force_async_tag_fault()        mte_check_tfsr_exit()
0257 #define arch_get_random_tag()           mte_get_random_tag()
0258 #define arch_get_mem_tag(addr)          mte_get_mem_tag(addr)
0259 #define arch_set_mem_tag_range(addr, size, tag, init)   \
0260             mte_set_mem_tag_range((addr), (size), (tag), (init))
0261 #endif /* CONFIG_KASAN_HW_TAGS */
0262 
0263 /*
0264  * Physical vs virtual RAM address space conversion.  These are
0265  * private definitions which should NOT be used outside memory.h
0266  * files.  Use virt_to_phys/phys_to_virt/__pa/__va instead.
0267  */
0268 
0269 
0270 /*
0271  * Check whether an arbitrary address is within the linear map, which
0272  * lives in the [PAGE_OFFSET, PAGE_END) interval at the bottom of the
0273  * kernel's TTBR1 address range.
0274  */
0275 #define __is_lm_address(addr)   (((u64)(addr) - PAGE_OFFSET) < (PAGE_END - PAGE_OFFSET))
0276 
0277 #define __lm_to_phys(addr)  (((addr) - PAGE_OFFSET) + PHYS_OFFSET)
0278 #define __kimg_to_phys(addr)    ((addr) - kimage_voffset)
0279 
0280 #define __virt_to_phys_nodebug(x) ({                    \
0281     phys_addr_t __x = (phys_addr_t)(__tag_reset(x));        \
0282     __is_lm_address(__x) ? __lm_to_phys(__x) : __kimg_to_phys(__x); \
0283 })
0284 
0285 #define __pa_symbol_nodebug(x)  __kimg_to_phys((phys_addr_t)(x))
0286 
0287 #ifdef CONFIG_DEBUG_VIRTUAL
0288 extern phys_addr_t __virt_to_phys(unsigned long x);
0289 extern phys_addr_t __phys_addr_symbol(unsigned long x);
0290 #else
0291 #define __virt_to_phys(x)   __virt_to_phys_nodebug(x)
0292 #define __phys_addr_symbol(x)   __pa_symbol_nodebug(x)
0293 #endif /* CONFIG_DEBUG_VIRTUAL */
0294 
0295 #define __phys_to_virt(x)   ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET)
0296 #define __phys_to_kimg(x)   ((unsigned long)((x) + kimage_voffset))
0297 
0298 /*
0299  * Convert a page to/from a physical address
0300  */
0301 #define page_to_phys(page)  (__pfn_to_phys(page_to_pfn(page)))
0302 #define phys_to_page(phys)  (pfn_to_page(__phys_to_pfn(phys)))
0303 
0304 /*
0305  * Note: Drivers should NOT use these.  They are the wrong
0306  * translation for translating DMA addresses.  Use the driver
0307  * DMA support - see dma-mapping.h.
0308  */
0309 #define virt_to_phys virt_to_phys
0310 static inline phys_addr_t virt_to_phys(const volatile void *x)
0311 {
0312     return __virt_to_phys((unsigned long)(x));
0313 }
0314 
0315 #define phys_to_virt phys_to_virt
0316 static inline void *phys_to_virt(phys_addr_t x)
0317 {
0318     return (void *)(__phys_to_virt(x));
0319 }
0320 
0321 /*
0322  * Drivers should NOT use these either.
0323  */
0324 #define __pa(x)         __virt_to_phys((unsigned long)(x))
0325 #define __pa_symbol(x)      __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
0326 #define __pa_nodebug(x)     __virt_to_phys_nodebug((unsigned long)(x))
0327 #define __va(x)         ((void *)__phys_to_virt((phys_addr_t)(x)))
0328 #define pfn_to_kaddr(pfn)   __va((pfn) << PAGE_SHIFT)
0329 #define virt_to_pfn(x)      __phys_to_pfn(__virt_to_phys((unsigned long)(x)))
0330 #define sym_to_pfn(x)       __phys_to_pfn(__pa_symbol(x))
0331 
0332 /*
0333  *  virt_to_page(x) convert a _valid_ virtual address to struct page *
0334  *  virt_addr_valid(x)  indicates whether a virtual address is valid
0335  */
0336 #define ARCH_PFN_OFFSET     ((unsigned long)PHYS_PFN_OFFSET)
0337 
0338 #if defined(CONFIG_DEBUG_VIRTUAL)
0339 #define page_to_virt(x) ({                      \
0340     __typeof__(x) __page = x;                   \
0341     void *__addr = __va(page_to_phys(__page));          \
0342     (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
0343 })
0344 #define virt_to_page(x)     pfn_to_page(virt_to_pfn(x))
0345 #else
0346 #define page_to_virt(x) ({                      \
0347     __typeof__(x) __page = x;                   \
0348     u64 __idx = ((u64)__page - VMEMMAP_START) / sizeof(struct page);\
0349     u64 __addr = PAGE_OFFSET + (__idx * PAGE_SIZE);         \
0350     (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
0351 })
0352 
0353 #define virt_to_page(x) ({                      \
0354     u64 __idx = (__tag_reset((u64)x) - PAGE_OFFSET) / PAGE_SIZE;    \
0355     u64 __addr = VMEMMAP_START + (__idx * sizeof(struct page)); \
0356     (struct page *)__addr;                      \
0357 })
0358 #endif /* CONFIG_DEBUG_VIRTUAL */
0359 
0360 #define virt_addr_valid(addr)   ({                  \
0361     __typeof__(addr) __addr = __tag_reset(addr);            \
0362     __is_lm_address(__addr) && pfn_is_map_memory(virt_to_pfn(__addr));  \
0363 })
0364 
0365 void dump_mem_limit(void);
0366 
0367 static inline bool defer_reserve_crashkernel(void)
0368 {
0369     return IS_ENABLED(CONFIG_ZONE_DMA) || IS_ENABLED(CONFIG_ZONE_DMA32);
0370 }
0371 #endif /* !ASSEMBLY */
0372 
0373 /*
0374  * Given that the GIC architecture permits ITS implementations that can only be
0375  * configured with a LPI table address once, GICv3 systems with many CPUs may
0376  * end up reserving a lot of different regions after a kexec for their LPI
0377  * tables (one per CPU), as we are forced to reuse the same memory after kexec
0378  * (and thus reserve it persistently with EFI beforehand)
0379  */
0380 #if defined(CONFIG_EFI) && defined(CONFIG_ARM_GIC_V3_ITS)
0381 # define INIT_MEMBLOCK_RESERVED_REGIONS (INIT_MEMBLOCK_REGIONS + NR_CPUS + 1)
0382 #endif
0383 
0384 /*
0385  * memory regions which marked with flag MEMBLOCK_NOMAP(for example, the memory
0386  * of the EFI_UNUSABLE_MEMORY type) may divide a continuous memory block into
0387  * multiple parts. As a result, the number of memory regions is large.
0388  */
0389 #ifdef CONFIG_EFI
0390 #define INIT_MEMBLOCK_MEMORY_REGIONS    (INIT_MEMBLOCK_REGIONS * 8)
0391 #endif
0392 
0393 #include <asm-generic/memory_model.h>
0394 
0395 #endif /* __ASM_MEMORY_H */