Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) 2020-2021 ARM Ltd.
0004  */
0005 #ifndef __ASM_KVM_MTE_H
0006 #define __ASM_KVM_MTE_H
0007 
0008 #ifdef __ASSEMBLY__
0009 
0010 #include <asm/sysreg.h>
0011 
0012 #ifdef CONFIG_ARM64_MTE
0013 
0014 .macro mte_switch_to_guest g_ctxt, h_ctxt, reg1
0015 alternative_if_not ARM64_MTE
0016     b   .L__skip_switch\@
0017 alternative_else_nop_endif
0018     mrs \reg1, hcr_el2
0019     tbz \reg1, #(HCR_ATA_SHIFT), .L__skip_switch\@
0020 
0021     mrs_s   \reg1, SYS_RGSR_EL1
0022     str \reg1, [\h_ctxt, #CPU_RGSR_EL1]
0023     mrs_s   \reg1, SYS_GCR_EL1
0024     str \reg1, [\h_ctxt, #CPU_GCR_EL1]
0025 
0026     ldr \reg1, [\g_ctxt, #CPU_RGSR_EL1]
0027     msr_s   SYS_RGSR_EL1, \reg1
0028     ldr \reg1, [\g_ctxt, #CPU_GCR_EL1]
0029     msr_s   SYS_GCR_EL1, \reg1
0030 
0031 .L__skip_switch\@:
0032 .endm
0033 
0034 .macro mte_switch_to_hyp g_ctxt, h_ctxt, reg1
0035 alternative_if_not ARM64_MTE
0036     b   .L__skip_switch\@
0037 alternative_else_nop_endif
0038     mrs \reg1, hcr_el2
0039     tbz \reg1, #(HCR_ATA_SHIFT), .L__skip_switch\@
0040 
0041     mrs_s   \reg1, SYS_RGSR_EL1
0042     str \reg1, [\g_ctxt, #CPU_RGSR_EL1]
0043     mrs_s   \reg1, SYS_GCR_EL1
0044     str \reg1, [\g_ctxt, #CPU_GCR_EL1]
0045 
0046     ldr \reg1, [\h_ctxt, #CPU_RGSR_EL1]
0047     msr_s   SYS_RGSR_EL1, \reg1
0048     ldr \reg1, [\h_ctxt, #CPU_GCR_EL1]
0049     msr_s   SYS_GCR_EL1, \reg1
0050 
0051     isb
0052 
0053 .L__skip_switch\@:
0054 .endm
0055 
0056 #else /* !CONFIG_ARM64_MTE */
0057 
0058 .macro mte_switch_to_guest g_ctxt, h_ctxt, reg1
0059 .endm
0060 
0061 .macro mte_switch_to_hyp g_ctxt, h_ctxt, reg1
0062 .endm
0063 
0064 #endif /* CONFIG_ARM64_MTE */
0065 #endif /* __ASSEMBLY__ */
0066 #endif /* __ASM_KVM_MTE_H */