include/asm/apple_m1_pmu.h

0001 // SPDX-License-Identifier: GPL-2.0
0002
0003 #ifndef __ASM_APPLE_M1_PMU_h
0004 #define __ASM_APPLE_M1_PMU_h
0005
0006 #include <linux/bits.h>
0007 #include <asm/sysreg.h>
0008
0009 /* Counters */
0010 #define SYS_IMP_APL_PMC0_EL1    sys_reg(3, 2, 15, 0, 0)
0011 #define SYS_IMP_APL_PMC1_EL1    sys_reg(3, 2, 15, 1, 0)
0012 #define SYS_IMP_APL_PMC2_EL1    sys_reg(3, 2, 15, 2, 0)
0013 #define SYS_IMP_APL_PMC3_EL1    sys_reg(3, 2, 15, 3, 0)
0014 #define SYS_IMP_APL_PMC4_EL1    sys_reg(3, 2, 15, 4, 0)
0015 #define SYS_IMP_APL_PMC5_EL1    sys_reg(3, 2, 15, 5, 0)
0016 #define SYS_IMP_APL_PMC6_EL1    sys_reg(3, 2, 15, 6, 0)
0017 #define SYS_IMP_APL_PMC7_EL1    sys_reg(3, 2, 15, 7, 0)
0018 #define SYS_IMP_APL_PMC8_EL1    sys_reg(3, 2, 15, 9, 0)
0019 #define SYS_IMP_APL_PMC9_EL1    sys_reg(3, 2, 15, 10, 0)
0020
0021 /* Core PMC control register */
0022 #define SYS_IMP_APL_PMCR0_EL1   sys_reg(3, 1, 15, 0, 0)
0023 #define PMCR0_CNT_ENABLE_0_7    GENMASK(7, 0)
0024 #define PMCR0_IMODE     GENMASK(10, 8)
0025 #define PMCR0_IMODE_OFF     0
0026 #define PMCR0_IMODE_PMI     1
0027 #define PMCR0_IMODE_AIC     2
0028 #define PMCR0_IMODE_HALT    3
0029 #define PMCR0_IMODE_FIQ     4
0030 #define PMCR0_IACT      BIT(11)
0031 #define PMCR0_PMI_ENABLE_0_7    GENMASK(19, 12)
0032 #define PMCR0_STOP_CNT_ON_PMI   BIT(20)
0033 #define PMCR0_CNT_GLOB_L2C_EVT  BIT(21)
0034 #define PMCR0_DEFER_PMI_TO_ERET BIT(22)
0035 #define PMCR0_ALLOW_CNT_EN_EL0  BIT(30)
0036 #define PMCR0_CNT_ENABLE_8_9    GENMASK(33, 32)
0037 #define PMCR0_PMI_ENABLE_8_9    GENMASK(45, 44)
0038
0039 #define SYS_IMP_APL_PMCR1_EL1   sys_reg(3, 1, 15, 1, 0)
0040 #define PMCR1_COUNT_A64_EL0_0_7 GENMASK(15, 8)
0041 #define PMCR1_COUNT_A64_EL1_0_7 GENMASK(23, 16)
0042 #define PMCR1_COUNT_A64_EL0_8_9 GENMASK(41, 40)
0043 #define PMCR1_COUNT_A64_EL1_8_9 GENMASK(49, 48)
0044
0045 #define SYS_IMP_APL_PMCR2_EL1   sys_reg(3, 1, 15, 2, 0)
0046 #define SYS_IMP_APL_PMCR3_EL1   sys_reg(3, 1, 15, 3, 0)
0047 #define SYS_IMP_APL_PMCR4_EL1   sys_reg(3, 1, 15, 4, 0)
0048
0049 #define SYS_IMP_APL_PMESR0_EL1  sys_reg(3, 1, 15, 5, 0)
0050 #define PMESR0_EVT_CNT_2    GENMASK(7, 0)
0051 #define PMESR0_EVT_CNT_3    GENMASK(15, 8)
0052 #define PMESR0_EVT_CNT_4    GENMASK(23, 16)
0053 #define PMESR0_EVT_CNT_5    GENMASK(31, 24)
0054
0055 #define SYS_IMP_APL_PMESR1_EL1  sys_reg(3, 1, 15, 6, 0)
0056 #define PMESR1_EVT_CNT_6    GENMASK(7, 0)
0057 #define PMESR1_EVT_CNT_7    GENMASK(15, 8)
0058 #define PMESR1_EVT_CNT_8    GENMASK(23, 16)
0059 #define PMESR1_EVT_CNT_9    GENMASK(31, 24)
0060
0061 #define SYS_IMP_APL_PMSR_EL1    sys_reg(3, 1, 15, 13, 0)
0062 #define PMSR_OVERFLOW       GENMASK(9, 0)
0063
0064 #endif /* __ASM_APPLE_M1_PMU_h */