0001 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 /*
0003 * Device Tree Source for the RZ/{G2L,V2L} SMARC pincontrol parts
0004 *
0005 * Copyright (C) 2021 Renesas Electronics Corp.
0006 */
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
0010
0011 &pinctrl {
0012 pinctrl-0 = <&sound_clk_pins>;
0013 pinctrl-names = "default";
0014
0015 can0_pins: can0 {
0016 pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
0017 <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
0018 };
0019
0020 /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
0021 can0-stb-hog {
0022 gpio-hog;
0023 gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>;
0024 output-low;
0025 line-name = "can0_stb";
0026 };
0027
0028 can1_pins: can1 {
0029 pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
0030 <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
0031 };
0032
0033 /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
0034 can1-stb-hog {
0035 gpio-hog;
0036 gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_HIGH>;
0037 output-low;
0038 line-name = "can1_stb";
0039 };
0040
0041 i2c0_pins: i2c0 {
0042 pins = "RIIC0_SDA", "RIIC0_SCL";
0043 input-enable;
0044 };
0045
0046 i2c1_pins: i2c1 {
0047 pins = "RIIC1_SDA", "RIIC1_SCL";
0048 input-enable;
0049 };
0050
0051 i2c3_pins: i2c3 {
0052 pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */
0053 <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */
0054 };
0055
0056 scif0_pins: scif0 {
0057 pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
0058 <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
0059 };
0060
0061 scif2_pins: scif2 {
0062 pinmux = <RZG2L_PORT_PINMUX(48, 0, 1)>, /* TxD */
0063 <RZG2L_PORT_PINMUX(48, 1, 1)>, /* RxD */
0064 <RZG2L_PORT_PINMUX(48, 3, 1)>, /* CTS# */
0065 <RZG2L_PORT_PINMUX(48, 4, 1)>; /* RTS# */
0066 };
0067
0068 sd1-pwr-en-hog {
0069 gpio-hog;
0070 gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
0071 output-high;
0072 line-name = "sd1_pwr_en";
0073 };
0074
0075 sdhi1_pins: sd1 {
0076 sd1_data {
0077 pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
0078 power-source = <3300>;
0079 };
0080
0081 sd1_ctrl {
0082 pins = "SD1_CLK", "SD1_CMD";
0083 power-source = <3300>;
0084 };
0085
0086 sd1_mux {
0087 pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
0088 };
0089 };
0090
0091 sdhi1_pins_uhs: sd1_uhs {
0092 sd1_data_uhs {
0093 pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
0094 power-source = <1800>;
0095 };
0096
0097 sd1_ctrl_uhs {
0098 pins = "SD1_CLK", "SD1_CMD";
0099 power-source = <1800>;
0100 };
0101
0102 sd1_mux_uhs {
0103 pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
0104 };
0105 };
0106
0107 sound_clk_pins: sound_clk {
0108 pins = "AUDIO_CLK1", "AUDIO_CLK2";
0109 input-enable;
0110 };
0111
0112 spi1_pins: spi1 {
0113 pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
0114 <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
0115 <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
0116 <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
0117 };
0118
0119 ssi0_pins: ssi0 {
0120 pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
0121 <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
0122 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
0123 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
0124 };
0125
0126 usb0_pins: usb0 {
0127 pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
0128 <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
0129 <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
0130 };
0131
0132 usb1_pins: usb1 {
0133 pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
0134 <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
0135 };
0136 };
0137
