0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Copyright 2020, Compass Electronics Group, LLC
0004 */
0005
0006 #include <dt-bindings/gpio/gpio.h>
0007 #include <dt-bindings/clk/versaclock.h>
0008
0009 / {
0010 memory@48000000 {
0011 device_type = "memory";
0012 /* first 128MB is reserved for secure area. */
0013 reg = <0x0 0x48000000 0x0 0x78000000>;
0014 };
0015
0016 osc_32k: osc_32k {
0017 compatible = "fixed-clock";
0018 #clock-cells = <0>;
0019 clock-frequency = <32768>;
0020 clock-output-names = "osc_32k";
0021 };
0022
0023 reg_1p8v: regulator-1p8v {
0024 compatible = "regulator-fixed";
0025 regulator-name = "fixed-1.8V";
0026 regulator-min-microvolt = <1800000>;
0027 regulator-max-microvolt = <1800000>;
0028 regulator-boot-on;
0029 regulator-always-on;
0030 };
0031
0032 reg_3p3v: regulator-3p3v {
0033 compatible = "regulator-fixed";
0034 regulator-name = "fixed-3.3V";
0035 regulator-min-microvolt = <3300000>;
0036 regulator-max-microvolt = <3300000>;
0037 regulator-boot-on;
0038 regulator-always-on;
0039 };
0040
0041 wlan_pwrseq: wlan_pwrseq {
0042 compatible = "mmc-pwrseq-simple";
0043 reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
0044 clocks = <&osc_32k>;
0045 clock-names = "ext_clock";
0046 post-power-on-delay-ms = <80>;
0047 };
0048 };
0049
0050 &avb {
0051 pinctrl-0 = <&avb_pins>;
0052 pinctrl-names = "default";
0053 phy-mode = "rgmii-rxid";
0054 phy-handle = <&phy0>;
0055 rx-internal-delay-ps = <1800>;
0056 tx-internal-delay-ps = <2000>;
0057 clocks = <&cpg CPG_MOD 812>, <&versaclock5 4>;
0058 clock-names = "fck", "refclk";
0059 status = "okay";
0060
0061 phy0: ethernet-phy@0 {
0062 compatible = "ethernet-phy-id004d.d074",
0063 "ethernet-phy-ieee802.3-c22";
0064 reg = <0>;
0065 interrupt-parent = <&gpio2>;
0066 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
0067 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
0068 };
0069 };
0070
0071 &extal_clk {
0072 clock-frequency = <16666666>;
0073 };
0074
0075 &extalr_clk {
0076 clock-frequency = <32768>;
0077 };
0078
0079 &gpio6 {
0080 usb-hub-reset-hog {
0081 gpio-hog;
0082 gpios = <10 GPIO_ACTIVE_HIGH>;
0083 output-high;
0084 line-name = "usb-hub-reset";
0085 };
0086 };
0087
0088 &hscif0 {
0089 pinctrl-0 = <&hscif0_pins>;
0090 pinctrl-names = "default";
0091 uart-has-rtscts;
0092 status = "okay";
0093
0094 bluetooth {
0095 compatible = "brcm,bcm43438-bt";
0096 shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
0097 host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
0098 device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
0099 clocks = <&osc_32k>;
0100 clock-names = "extclk";
0101 max-speed = <4000000>;
0102 };
0103 };
0104
0105 &hscif2 {
0106 status = "okay";
0107 pinctrl-0 = <&hscif2_pins>;
0108 pinctrl-names = "default";
0109 };
0110
0111 &i2c4 {
0112 status = "okay";
0113 clock-frequency = <100000>;
0114
0115 pca9654: gpio@20 {
0116 compatible = "onnn,pca9654";
0117 reg = <0x20>;
0118 gpio-controller;
0119 #gpio-cells = <2>;
0120 gpio-line-names =
0121 "i2c4_20_0",
0122 "wl_reg_on",
0123 "bt_reg_on",
0124 "i2c4_20_3",
0125 "i2c4_20_4",
0126 "bt_dev_wake",
0127 "i2c4_20_6",
0128 "i2c4_20_7";
0129 };
0130
0131 pca9654_lte: gpio@21 {
0132 compatible = "onnn,pca9654";
0133 reg = <0x21>;
0134 interrupt-parent = <&gpio5>;
0135 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
0136 interrupt-controller;
0137 #interrupt-cells = <2>;
0138 gpio-controller;
0139 #gpio-cells = <2>;
0140 gpio-line-names =
0141 "i2c4_21_0",
0142 "zoe_pwr_on",
0143 "zoe_extint",
0144 "zoe_reset_n",
0145 "sara_reset",
0146 "i2c4_21_5",
0147 "sara_pwr_off",
0148 "sara_networking_status";
0149 };
0150
0151 eeprom@50 {
0152 compatible = "microchip,24c64", "atmel,24c64";
0153 pagesize = <32>;
0154 read-only; /* Manufacturing EEPROM programmed at factory */
0155 reg = <0x50>;
0156 };
0157
0158 rtc@51 {
0159 compatible = "nxp,pcf85263";
0160 reg = <0x51>;
0161 };
0162
0163 versaclock5: versaclock_som@6a {
0164 compatible = "idt,5p49v6965";
0165 reg = <0x6a>;
0166 #clock-cells = <1>;
0167 clocks = <&x304_clk>;
0168 clock-names = "xin";
0169 /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
0170 assigned-clocks = <&versaclock5 1>,
0171 <&versaclock5 2>,
0172 <&versaclock5 3>,
0173 <&versaclock5 4>;
0174
0175 assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
0176
0177 OUT1 {
0178 idt,mode = <VC5_CMOS>;
0179 idt,voltage-microvolt = <1800000>;
0180 idt,slew-percent = <100>;
0181 };
0182
0183 OUT2 {
0184 idt,mode = <VC5_CMOS>;
0185 idt,voltage-microvolt = <1800000>;
0186 idt,slew-percent = <100>;
0187 };
0188
0189 OUT3 {
0190 idt,mode = <VC5_CMOS>;
0191 idt,voltage-microvolt = <1800000>;
0192 idt,slew-percent = <100>;
0193 };
0194
0195 OUT4 {
0196 idt,mode = <VC5_CMOS>;
0197 idt,voltage-microvolt = <3300000>;
0198 idt,slew-percent = <100>;
0199 };
0200 };
0201 };
0202
0203 &pfc {
0204 pinctrl-0 = <&scif_clk_pins>;
0205 pinctrl-names = "default";
0206
0207 avb_pins: avb {
0208 mux {
0209 groups = "avb_link", "avb_mdio", "avb_mii";
0210 function = "avb";
0211 };
0212
0213 pins_mdio {
0214 groups = "avb_mdio";
0215 drive-strength = <24>;
0216 };
0217
0218 pins_mii_tx {
0219 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
0220 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
0221 drive-strength = <12>;
0222 };
0223 };
0224
0225 scif2_pins: scif2 {
0226 groups = "scif2_data_a";
0227 function = "scif2";
0228 };
0229
0230 hscif0_pins: hscif0 {
0231 groups = "hscif0_data", "hscif0_ctrl";
0232 function = "hscif0";
0233 };
0234
0235 hscif1_pins: hscif1 {
0236 groups = "hscif1_data_a", "hscif1_ctrl_a";
0237 function = "hscif1";
0238 };
0239
0240 hscif2_pins: hscif2 {
0241 groups = "hscif2_data_a";
0242 function = "hscif2";
0243 };
0244
0245 scif0_pins: scif0 {
0246 groups = "scif0_data";
0247 function = "scif0";
0248 };
0249
0250 scif5_pins: scif5 {
0251 groups = "scif5_data_a";
0252 function = "scif5";
0253 };
0254
0255 scif_clk_pins: scif_clk {
0256 groups = "scif_clk_a";
0257 function = "scif_clk";
0258 };
0259
0260 i2c0_pins: i2c0 {
0261 groups = "i2c0";
0262 function = "i2c0";
0263 };
0264
0265 sdhi2_pins: sd2 {
0266 groups = "sdhi2_data4", "sdhi2_ctrl";
0267 function = "sdhi2";
0268 power-source = <1800>;
0269 };
0270
0271 sdhi3_pins: sd3 {
0272 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
0273 function = "sdhi3";
0274 power-source = <1800>;
0275 };
0276 };
0277
0278 &scif_clk {
0279 clock-frequency = <14745600>;
0280 };
0281
0282 &scif2 {
0283 pinctrl-0 = <&scif2_pins>;
0284 pinctrl-names = "default";
0285 status = "okay";
0286 };
0287
0288 &sdhi2 {
0289 pinctrl-names = "default";
0290 pinctrl-0 = <&sdhi2_pins>;
0291 bus-width = <4>;
0292 vmmc-supply = <®_3p3v>;
0293 vqmmc-supply = <®_1p8v>;
0294 non-removable;
0295 cap-power-off-card;
0296 keep-power-in-suspend;
0297 mmc-pwrseq = <&wlan_pwrseq>;
0298 status = "okay";
0299 #address-cells = <1>;
0300 #size-cells = <0>;
0301
0302 brcmf: bcrmf@1 {
0303 reg = <1>;
0304 compatible = "brcm,bcm4329-fmac";
0305 interrupt-parent = <&gpio1>;
0306 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
0307 interrupt-names = "host-wake";
0308 };
0309 };
0310
0311 &sdhi3 {
0312 pinctrl-0 = <&sdhi3_pins>;
0313 pinctrl-1 = <&sdhi3_pins>;
0314 pinctrl-names = "default", "state_uhs";
0315 vmmc-supply = <®_3p3v>;
0316 vqmmc-supply = <®_1p8v>;
0317 bus-width = <8>;
0318 mmc-hs200-1_8v;
0319 no-sd;
0320 no-sdio;
0321 non-removable;
0322 fixed-emmc-driver-type = <1>;
0323 status = "okay";
0324 };
0325
0326 &usb2_clksel {
0327 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
0328 <&versaclock5 3>, <&usb3s0_clk>;
0329 status = "okay";
0330 };
0331
0332 &usb3s0_clk {
0333 clock-frequency = <100000000>;
0334 };
